Bearing Life: A Future Package Cooling Challenge



We all know that over the past decade, as silicon technology has continued to scale in accordance with Moore’s Law, thermal design for cooling microprocessor packages has become increasingly challenging.

The International Technology Roadmap for Semiconductors (ITRS) – 2004 Update, shown in Figure 1, forecasts that thermal design power (TDP) will rise linearly up to approximately 2009 to 2010, and remain approximately constant afterward. However, this data does not show if new cooling technologies are necessary for future packages. Due to die shrinkage and other complexities of the microprocessor design, there is a possibility of increased local power densities, commonly referred to as “hot spots.” Thermal cooling solutions for packages must ensure that the junction temperature of the processor (die temperature) does not exceed temperatures in the 90° to 110°C range, typically at the hot spots, to ensure device performance and reliability. It is critical to ensure that equal research focus on meeting both TDP and junction temperature (hot spot temperature) specifications.

Figure 1. ITRS Roadmap(s) and CPU historical data.
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A majority of OEMs within the microelectronics industry would like to further extend the application of air-cooling technologies. However, it has already been shown that current air-cooling technologies present diminishing returns – making it strategically important for the microelectronics industry to establish the R&D focus for future non air-cooling technologies.2 For better understanding of the cooling capability for different thermal solutions used in CPU cooling, we will use Torresola et. al.’s proposed density factor (DF) definition as a significant metric for the package performance.3 This metric can be used to quantify the impact of non-uniform die heating on thermal management difficulty for a specific package. The advantage of this metric is its ability to provide a better “apples-to-apples” comparison of the effect of different power maps and die sizes on a specific package thermal management. Figure 2 shows the location of the temperature measurement for junction and case (lidded-type package).

Figure 2. Lidded package and heatsink.
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Based on temperatures shown in Figure 2, the junction-to-case density factor for a package is defined as:

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Where Ψjc (°C/W) is the thermal resistance from junction to case, and Rjc (°Ccm2/W) is defined as the thermal resistance normalized by die area when the die is uniformly powered.

Another important metric for the cooling technologies comparison is the sink to ambient resistance:

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Where Ts is the sink maximum temperature (°C), Ta is ambient temperature (°C), and TDP is CPU power dissipation.

Based on the DFjc, defined at the beginning of this article, the proposed technologies are compared against conventional air cooling (Figure 3). The boundary conditions for the plot are: air cooling Ψsa = 0.2°C/W; enabled liquid cooling Ψsa = 0.13°C/W; thermoelectric- based devices Ψsa = 0.08°C/W; and refrigeration: Ψsa = 0°C/W (no condensation case).

Figure 3. Schematic of a micro-channel cooling system.
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It can be seen that as the package DF increases, the best performing technologies are either single-phase microchannel or refrigeration. Also, it can be concluded that the most promising package cooling technologies are based on either pumps or vapor compressors. These technologies are using rotational parts like shafts and bearings, especially if a high pressure drop is specified. Typical reliability requirements for the electronics industry vary by market segment. A range of 40,000 to 80,000 hrs. of continuous operation without maintenance is a typical requirement. If we compare this to the automobile market (although under different boundary conditions) with a typical 7,000 hrs. of operation (sometimes with maintenance-scheduled requirements), you can realize the difficulty and challenges facing the package cooling industry when such rotary devices begin being used. To better understand challenges under certain boundary conditions, single-phase microchannel issues were investigated.

Figure 4. Thermal performance of single-phase micro-channel devices for different fluids vs. pressure drop.
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Based on Figure 4, we define the junction to inlet thermal resistance Rj-inlet as follows:

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Where Tj, max is the junction temperature at the hottest point of the die (°C); tin is the inlet liquid temperature in the microchannel cold plate (°C); and the TDP is the thermal design power (W).

Figure 5. Simplified schematic of a sleeve (journal) bearing.
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The thermal performance of a package-based microchannel cold plate is shown in Figure 5, as a function of the pressure drop through the microchannel. It can be seen that to reduce the thermal resistance of the microchannels, a large pressure drop will result. In turn, this large pressure drop across the device will generate significant large forces on bearings, increasing the wear and possibly reducing the lifetime of the pumps. In addition, the low physical size of the pump and compressor shafts may impose significant additional challenges on bearing design. Not last, due to the requirement of having a complete seal device and no maintenance, the coolant fluid must be used as a lubricant as well. These are usually conflicting properties for any fluid. Due to all of the above limitations, sleeve bearing may be the most advantageous for future devices used in package cooling.

Figure 6. Lubrication regime for pumps using a coolant as a lubricant.
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Figure 6 shows the schematic of a sleeve bearing. It can be seen that the sleeve bearing relies on maintaining a continuous film between the shaft and the housing. In a simplified way, the fundamental requirement for two surfaces to be lubricated is that the operating thickness of lubricant between the surfaces must be thicker than the roughness of the surfaces. Based on the Summerfield number, the minimum film thickness can be found as a main function of rotational speed, radial loading, shaft diameter, length of the shaft into bearing, and eccentricity of the shaft.6 Due to the pressure drop across microchannels, the radial forces could have high values, but are usually less than 10 N. A dimensionless parameter Λ (Equation 4) is then used to determine the regime of lubrication.

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Where σshaft and σhousing are the root mean square roughness for the shaft respectively housing (m), and hmin is the minimum film thickness of the lubricant. Typically, hydrodynamic lubrication occurs when Λ > 5. This parameter is plotted in Figure 7 as a function of RPM and radial loading (shaft OD=3 mm; fluid viscosity of 1.5 cP; roughness = better than mirror surfaces).


The hydrodynamic lubrication film cannot be maintained under all conditions, and this may be a major issue for any cooling device to be used in future package cooling. Although cooling solutions using pumps or compressors provide good package cooling, the thermal solution providers should not overlook the bearing life to ensure overall package reliability.


  1. International Technology Roadmap for Semiconductors-2004 Update;
  2. Sauciuc, I., Chrysler, G., Mahajan, R., Szleper, M., 2003, “Air-cooling Extension – Performance Limits for Processor Cooling Applications,” Proceedings of the 19th SEMI-THERM, San Jose, California, USA, 2003.
  3. Ioan Sauciuc, et. al. “Thermal Performnace and Key Challenges for future CPU Cooling Technologies,” Proceedings of IPACK2005; ASME InterPACK ‘05, July 17-22, San Francisco, California, USA (to be presented).
  4. Brown, M.F., Chrysler, G.M., Maveety, J.G., and Sanchez, E.A., 2001, “Thermal Management for Electronics Cooling using a Miniature Compressor,” M-CALC III, Third Workshop on Military & Commercial Applications for Low-Cost Cryocoolers, San Diego, CA.
  5. Torresola, J., Chiu, C.P., Chrysler, G., Grannes, D., Mahajan, R., Prasher, R., Watwe, A., “Density Factor Approach to Representing Impact of Die Power Maps on Thermal Management,” IEEE Transactions on Advanced Packaging, (in press).
  6. Shigley, J.E., Mischke, C., R., “Mechanical Engineering Design”, Fifth Edition, McGraw Hill, 2002.

IOAN SAUCIUC, senior engineer, Thermal Enabling manager, RAVI PRASHER, senior packaging engineer, JE-YOUNG CHANG, senior packaging engineer, RAVI MAHAJAN, principal engineer, and CHRIS MIGLIACCIO, intern, may be contacted at Intel Corp., Assembly Technology Development, 5000 W. Chandler Blvd., Chandler, AZ 85226; (408) 552-0450; e-mail: [email protected].


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