By Mike Yeh, Shu-Ping Fang, Bo-Jau Tsau, C.C. Huang, Benjamin Lin, United Microelectronic Corp.; Steven Fu, Jay Chen, Regina Freed, Ted Dziura, Mike Slessor, KLA-Tencor Corp.

This work evaluates the capability of a spectroscopic ellipsometry-based profile technology as a new metrology tool to monitor polysilicon gate processes at 130nm and 90nm nodes. This study proves that this method can consistently flag different profile excursions of polysilicon gate (e.g., small notching, footing, or undercut).

A common issue for etching processes is the existence of a small notch or foot at the bottom of a polysilicon gate. There are many causes of poly gate profile excursions; a change in the grain size of polysilicon, etching condition, energy and dose of ion implantation could lead to different profiles. Even in a single chip, n-doped poly and p-doped poly generally show different profiles. With decreasing device size, it becomes even more important to control the profile of the polysilicon gate because a small notch or foot could have a major impact on the length of the polysilicon gate, and the performance of the device would then be affected significantly, especially for cutting-edge devices. Tighter control of gate profile leads to tighter distribution of transistor speeds, resulting in optimized and more consistent performance.