IBM commits to Suss’ C4NP bump line

September 8, 2005 – After a year of codeveloping next-generation, lead-free wafer solder-bump technology, IBM Corp. has ordered a controlled collapse chip connection new process (C4NP) high-volume bumping line from Suss MicroTec. IBM and Suss are currently are installing a prototype semiautomatic C4NP line at IBM’s facilities in East Fishkill, NY to perfect the process; the new fully-automatic line, which can accommodate 300 wafer starts/day, is scheduled to be shipped by the end of 1Q06.

In September 2004 the two companies agreed to develop C4NP equipment and commercialize the wafer solder-bump technology, which supports 100% lead-free packaging with a combination of fine-pitch connections, low cost, and the flexibility to use a wide variety of solder compositions.


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