September 28, 2005 – The Soitec Group and the SEZ Group have announced their participation in a joint development program (JDP) intended to speed next-generation strained silicon-on-insulator (sSOI) substrate manufacturing. The companies plan to combine Soitec’s engineered substrate techniques and SEZ’s single-wafer wet-processing technology to develop wet-etch processes designed to optimize germanium removal in sSOI manufacturing. Silicon germanium is a key component in producing the silicon layer strain. Company representatives claim that single-wafer processing shows promise for enabling selective control during the germanium etching process, removing only the desired material without damaging underlying material layers.