September 26, 2005 – Ziptronix, Morrisville, NC, has made good on its efforts at creating a three-dimensional IC device to serve as an alternative to system-in-package (SiP) technology, according to a company statement. Since January, when the 3D IC developer’s plans to produce first silicon within 1Q05 were announced by Solid State Technology, the company has realized what it claims is the first 3D system-on-a-chip (SoC) device — employing proprietary ZiROC and ZiCON technologies — to combine memory, microprocessor, and programmable-logic die into a single, multilevel silicon die measuring 280mm2 and the second level measuring just 0.03mm in height.
A spin-off from the Research Triangle Institute, Ziptronix exercised its experience in dielectric covalent bonding and die thinning by means of an adhesive-free method (ZiROC) that forms covalent bonds directly between silicon oxide-coated die using available manufacturing equipment and techniques. Off-the-shelf components and die-scale integration have helped reduce the time-to-market design cycle to six months vs. the typical 12-14 months. Phil Nyborg, president and CEO, believes that this 3D integration technology will enable “devices with 2 billion-plus transistors in the smallest possible footprint” for communications, embedded systems, and consumer electronics applications.