November 2005 Exclusive Feature: WAFER LEVEL TEST

Reliability testing using a highly parallel source-measure method

Pete Hulbert, Keithley Instruments Inc., Cleveland, Ohio

New semiconductor materials and shrinking device dimensions have made reliability testing increasingly important because the gate dielectric behavior of modern devices isn’t well understood, requiring the development of new device lifetime models. However, traditional test methods (Fig. 1) are time consuming and not suitable for new materials and shorter development cycles. A new approach (Fig. 2) using dedicated targeted source-measure channels provides statistically significant quantities of data in less time than a typical stress-switch-measure system. Extensive testing of both individual and groups of devices is necessary to generate the large amount of data necessary to establish these new lifetime models..

With market pressures pushing devices built with the new high-k materials into production sooner, there is less time for device characterization, process development, and process integration [1-3]. However, high-k materials aren’t as well understood or as easily fabricated as traditional SiO2 materials, which increases the need for reliability testing at the wafer level…

The full article is available in a pdf format.

If you have any questions or comments, please contact:
Julie MacShane, Managing Editor, SST at email: [email protected]

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