Japan joint fab targets production in 2007

February 28, 2006 – Advanced Process Semiconductor Foundry Planning Co., the planning company set up by a trio of Japanese chipmakers to evaluate the feasibility of a joint fab operation, expects to start production by the end of 2007, with target output of 10,000 300mm wafers/month, according to the Nihon Keizai Shimbun.

Hitachi Ltd., Toshiba Corp., and Renesas Technology Corp. put up about 100 million yen (US ~$860,000) to form the planning group in December, to consider putting a line into an existing Toshiba or Renesas fab, for all partners to use to produce their system chips. Putting the line in one of their fabs hopefully would limit overall investment to about 100 billion yen ($860 million). The paper also reported that if the company encounters problems or little interest from customers, the business plan would be abandoned, rather than postponed.

The original announcement in December noted the trio would continue to recruit other partners into their significantly scaled-down joint fab plan, but there appears to be a remarkable lack of enthusiasm among the rest of the big Japanese companies. Also notably absent from the original deal was any investment from the government, which had been an early cheerleader for such a project.

Starting up as a jointly owned independent foundry, instead of a shared joint fab, would put the partnership in direct competition with established foundries, including TSMC, which already is in pilot production of 65nm on 300mm wafers.


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