Report: Nano-memory market surging past $7B by 2010

February 7, 2006 – A new analyst report suggests the market for various types of nano-enabled memory will quadruple from $1.4 billion in 2008 to more than $7.0 billion in 2010, as conventional memory technologies fail to scale to address problems in leading-edge chip technologies such as leakage.

The report from NanoMarkets suggests that MRAM will make up ~21% of the market ($1.5B) for nano-enabled memory in 2010, followed by holographic and nanocrystalline ($980M each) and ovonic memory ($877M). MRAM promises high-capacity next-generation memory as a replacement for SRAM-flash combinations and battery-backup RAM, as well as supply improved nonvolatile memory for high-end mobile products. More than a dozen companies are currently exploring MRAM, with products already being sampled.

Holographic and nanocrystalline memories, seen as a candidate for high-end data storage and consumer video media markets, are gaining favor with chipmakers including Intel, Freescale, Micron, Samsung, and STMicroelectronics, the report claims.

The analyst firm pegs 2010 as the “breakout” year for nano-enabled memories, due to conventional memories’ inability to scale further or provide enough memory to support ubiquitous computing. Technical improvements such as lower power requirements for ovonic memory, and commitments to specific platforms (e.g., Freescale to nanocrystalline) have brought nanomemory “much closer to reality,” the report states.

Leakage problems with 65nm process technologies can be addressed by 3D structures only to a point; similarly flash memory “has a serious architectural scaling problem” at sub-90nm nodes, the report claims. SRAM developers have moved from large 6T cells to 1T pseudo SRAM, but only as a waypoint to better architecture for future nodes. Nano-enabled memories targeting mobile computing and communications offer high capacity with fast storage and access to video and large databases without overburdening battery power sources.

For example, adding nonvolatile memory to the CPU chip (via nanocrystalline) increases data access times and reduces power and chip count. Replacing on-chip SRAM in L2 cache also can reduce CPU power consumption. A bank of low-power, nonvolatile MRAM could serve as a replacement to disk drives, storing system and applications software as well as data, enabling an “instant” on notebook powered for a full day on a single battery, the firm suggested.


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