TSMC, UMC: We’re ready at 65nm for X Architecture

May 25, 2006 – Taiwan’s top two foundries, TSMC and UMC, say their 65nm process technologies are ready for chip designs utilizing the X Architecture, having been qualified through Cadence Design Systems.

The architecture utilizes diagonal interconnects instead of the traditional right-angle layout resembling Manhattan street grids, which proponents say can shorten wiring by up to 20% across a die and reduce the number of vias by 30%.

TSMC produced a high-volume graphics processor with X Architecture using 0.11-micron process technologies in June 2005, and qualified its 90nm process in October. UMC qualified X Architecture design rules with its 90nm process in April 2005.


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