May 5, 2006 – Researchers at UCLA’s Henry Samueli School of Engineering and Applied Science say they have created three new nanoscale computational architectures using spin waves as the mechanism for multiple interconnections, to achieve low-power device performance and improved scalability.
“We’ve made a significant effort to demonstrate the operation of spin-based devices at room temperature,” stated researcher Alexander Khitun, adding that early results suggest indicate that information can be transmitted via spin waves propagating in spin waveguides ferromagnetic films.
The researchers claim the creation and detection of spin-wave packets could compete with currently proposed spintronic architectures for development of massively parallel computational operations, enabling the design of a fully interconnected network of processors on a single chip. Spintronics relies on a charge transfer for information exchange, and shows significant interconnection problems, the UCLA scientists claim.
The first device developed by UCLA engineers, described in a paper at the annual ACM International Conference on Computing Frontiers this month, is a reconfigurable mesh interconnected with spin-wave buses. The architecture of the device requires the same number of switches and buses as standard reconfigurable meshes, but is capable of simultaneously transmitting multiple waves using different frequencies on each of the spin-wave buses, making the parallel architecture capable of very fast and fault-tolerant algorithms. Unlike the traditional spin-based nanostructures that transmit charge, with this design only waves are transmitted, keeping power consumption extremely low, the researchers claim.
The second architecture invention, to be described later this month at the Nanotech 2006 event in Boston, is a fully connected cluster of functional units with spin-wave buses, in which each node simultaneously broadcasts to all other nodes, and can receive and process multiple data concurrently. The novel design allows all nodes to intercommunicate in constant time, and overcomes traditional area restrictions found in current networks.
A third device, a spin-wave-based crossbar for fully interconnecting multiple inputs to multiple outputs, offers much more fault-tolerance than standard molecular crossbar designs, allowing alternate paths to be reconfigured in case of switch failure, the UCLA team claims. By transmitting waves instead of traditional current charge transmission, the design architecture allows a large reduction in power consumption and provides a high level of interconnectivity between many more paths than currently possible. The device will be described at the 2006 IEEE Conference on Nanotechnology in July.
“We’re tremendously excited about the future of this research,” stated UCLA Engineering adjunct professor Mary Mehrnoosh Eshaghian-Wilner. “The designs demonstrate outstanding performance as interconnects for massively parallel integrated circuits.”
Applications for these three designs now being evaluated include mapping biologically inspired types of computations for image processing and neural computations, as well as bioinformatics and implantable biomedical devices. Heterogeneous integrations of these designs in a complementary fashion with other molecular and nanotechnologies also are being developed, the researchers noted.