July 11, 2006 – ASM America, a subsidiary of ASM International NV, and CEA-Leti are forming a joint development research program (JDP) to develop sub-45nm epitaxy and epitaxy pre-clean technologies, with the goal of finding alternative processing schemes for new front-end-of-line CMOS processing technologies.

Under terms of the program, ASM and CEA-Leti will cooperate to develop and evaluate low-temperature epitaxy and hetero-epitaxial processes. The companies aim to develop selective and blanket strained silicon processes for recessed and elevated source drain applications, and use of SiGe and Ge films to design advanced CMOS channels and substrate schemes. Work will be conducted at CEA-Leti’s MINATEC research facilities in Grenoble, France. The first phase of research will utilize ASM’s 200mm Epsilon tool, migrating to the company’s advanced Epsilon 300mm tool in later phases.

“This project with ASM builds on our prior development work around Si and SiGe epitaxial processes with the goal of bringing them to the manufacturing mainstream for forthcoming technology nodes,” stated Olivier Demolliens, Nanotec director at CEA-Leti.