Litho panel probes concerns about the “Road” ahead

by Bob Haavind, Editorial Director

A somewhat surprising consensus on future lithography came out of a panel of experts organized by Sokudo Corp., a DNS/Applied Materials joint venture, at SEMICON West. Details of presentations discussing potential lithography solutions for the 32nm half-pitch node were reported in a July 18 WaferNews story by senior editor M. David Levenson, including major problems facing developers of EUV and high-index fluid immersion lithography using 193nm lasers.

“There is not enough time for NGL [next-generation lithography] to replace wet 193nm with double patterning,” Phil Ware of Canon said simply, and met with no disagreement. For EUV, he cited particularly the seemingly ever-rising estimate of required source power, now being projected into the hundreds of watts range. Gene Fuller of Nikon Precision added that going beyond DI water for the 32nm node was similarly too technically challenging, with new lens material as well as high-index fluids required. Burn Lin of TSMC had explained in his earlier presentation that the lens also would have to be curved, and handling variable thickness liquids would present far more problems than present immersion systems.

Fuller pointed out that although there were serious objections to the slower throughput for dual-exposure lithography while extending present immersion litho systems with higher NA, only critical layers would need the added steps. “It may go from 30 to 34 layers,” he suggested, for a typical wafer. At the same time, Fuller agreed that overlay would be a major challenge.

S.V. Sreenivasan, CTO of Molecular Imprints, suggested there could be a problem developing the needed photomask infrastructure for dual patterning. Defects could be difficult, and it would be tough to achieve the required overlay, which might be in the 2-3nm range.

Chipmakers also want to avoid a single-node solution, according to Skip Miller of ASML. He said that any development that improved throughput for double patterning would be very important.

There was a question from the audience about the possibility of twin-reticle-stage stepper/scanners, but this was felt to be unlikely because of the huge masses of twin lens towers, according to Fuller.

Canon’s Ware cited a proposal by Mike Fritze of MIT’s Lincoln Lab to combine interferometry with a mask to provide a long-term solution, but this would be unlikely to be developed in time for the 32nm node.

Fast reticle changes could help speed throughput, but the wafer would have to remain on the chuck between exposures, making overlay a very serious issue, suggested Miller of ASML. Sreenivasan pointed out that any slippage in overlay would impact CDs.

The panelists were asked about multi-e-beam direct write systems, which Burn Lin suggested in his presentation promised the lowest cost/wafer of any of the alternatives being considered. “E-beam is too slow,” responded Phil Ware of Canon, labeling it a dark-horse candidate. “Most chipmakers have rejected it due to throughput limitations.”

Nikon’s Fuller pointed out that it would be extremely hard to keep thousands of electron beams under control, and chipmakers laugh at throughputs of 15 wafers/hour. But that’s still orders of magnitude better than any that have yet been achieved with e-beam direct write, commented Sreenivasan of Molecular Imprints.

The technology would only make sense in a high product mix environment, pointed out Miller of ASML, where reticle costs dominate.

Metrology also was discussed in response to a question from a Seagate engineer. Techniques are being developed for CD and overlay using scatterometry, Miller commented, but he feels that defects will be an even bigger challenge since some will be too small to detect. Fuller suggested that metrology limits are not unique to double patterning, although measuring overlay could prove very tough.

Ware suggested that the use of a pellicle with 193nm lithography offered a big advantage in limiting defects. He also pointed out there is no technology to support 1X patterning at 32nm, which also favors 193nm dual exposure.

For EUV, Fuller feels that while technology hurdles may be overcome, there could be even bigger problems with the needed infrastructure. Maintenance will be very costly, with frequent lens cleaning and replacement, which would also impact productivity.

The consensus seemed clear — the industry will have to learn how to live with dual-patterning at least for awhile, while toolmakers seek ways to boost throughput limits. — B.H.


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