September 5, 2006 – Synopsys Inc. and Chinese foundry Semiconductor Manufacturing International Corp. (SMIC) have developed and deployed a third-generation reference design flow based on SMIC’s 90nm process, targeting a range of automated low-power and design-for-manufacturing capabilities for complex system-on-chip (SoC) designs.
The process and reference design flow were validated using multiple voltage standard cell libraries, low-power design kit, memory compiler, and I/O. Advanced closure features in the flow target concurrent timing, power optimization and signoff, including signal integrity (SI) prevention, analysis, and repair.