Small Times

Sept. 12, 2006 — Surface Technology Systems plc (STS), a developer of plasma process technologies required in the manufacturing and packaging of MEMS and advanced electronic devices, announced the development of a new Deep Reactive Ion Etch (DRIE) plasma source which is compatible with 300mm silicon wafers commonly used in the large scale manufacturing of silicon-based integrated circuits.

The DRIE process is a key silicon micromachining technique invented by Robert Bosch GmbH, developed by STS and used in the manufacturing of MEMS for the past 10 years. As circuit complexity and device speed increases it is becoming increasingly necessary to stack thinned wafers or chips rather than integrate all the required functional elements into a single, two-dimensional system-on-a-chip (SoC).

As the number of stacked die and their I/O count increases wire bonding technologies become increasingly complex and costly. STS says through-wafer interconnects offer other advantages over wire bonding, including reduced die footprint, shorter interconnect distances and vias that can be positioned within the die rather than only at the edges.

With the launch of its Pegasus DRIE source in 2005, STS demonstrated higher silicon etch rates, which made the fabrication of the through-wafer via solution more attractive to IC manufacturers. The company says this created a demand for the same process capabilities on a 300mm platform.