Researchers identify roadblock to thin-film capacitance scaling

October 13, 2006 – A so-called “dielectric dead layer” at the metal-insulator interface is the culprit behind the limitation in reducing the size of thin-film capacitors, and using metals with good screening properties can help fix the problem, according to researchers at the U. of California-Santa Barbara.

Despite using high-permittivity materials in nanoscale devices to achieve more capacitance in a smaller area, researchers have encountered lower-than-expected capacitance values that limit the performance of thin-film capacitors and prevent further electronic device miniaturization. UCSB researchers in the Materials Department of the College of Engineering used quantum mechanical calculations to prove that a so-called “dielectric dead layer” at the metal-insulator interface is responsible for the observed capacitance reduction.

In the October 12 issue of Nature, prof. Nicola Spaldin and postdoc researcher Massimiliano Stengel state that the fundamental quantum mechanical properties of the interfaces are the root cause of the problem. Further, they show that metals with good screening properties can be used to improve the properties. “Our results provide practical guidelines for minimizing the deleterious effects of the dielectric dead layer in nanoscale devices,” they said.

The research was supported by the Materials Theory program of the Division of Materials Research at the National Science Foundation.


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