UMC touts working 45nm SRAMs

November 20, 2006 – Taiwanese foundry United Microelectronics Corp. (UMC) says it has produced functional 45nm SRAM chips at its Fab 12A, using immersion lithography for 12 critical layers, as well as ultrashallow junctions, mobility enhancement techniques, and a k=2.5 ultralow-k dieletric.

UMC says its 45nm process shrinks 6-transistor SRAM cell size by 50% to <0.25 sq. microns vs. its 65nm process, with a 30% increase in device performance, while also shrinking design rules by 30%. The company also said that the 45nm SRAM memory bit-cell and macro circuit "require good minimum supply voltage capability." and that building optional circuits into the test vehicle can further improve minimum supply voltage.

“The 45nm node is a challenging technology generation that simultaneously introduces new materials and process modules,” stated Shih-Wei Sun, EVP of UMC’s central R&D division and Fab 12A, adding that the company is “encouraged” by initial 45nm wafer lot results.

UMC has two 300mm fabs in operation now: Fab 12A, with monthly output of about 28,000 wafer starts, and Fab 12i in Singapore, expected to achieve around 17,000 WSPM by year’s end. TSMC is currently working with Qualcomm Inc. on its 45nm telecom chips, with the first products expected by the end of 3Q07.


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