This Week in Packaging

By Jeffrey C. Demmin, contributing editor

Two of the premier conferences in the semiconductor industry fill the calendar in early December: SEMICON Japan and IEEE’s International Electron Devices Meeting (IEDM). Both events had some interesting updates for us.

IEDM is a top technical conference for the semiconductor industry. Many companies and universities use this event as the venue to announce the biggest advances of research groups. Some of the biggest headlines this year involved 3-D integration. This just in… 3-D is a hot topic in the industry… The Belgian research organization IMEC, for example, presented work on thinned silicon die with through-silicon vias (TSVs) and thermo-compression bonding of copper for the vertical interconnections. They reported a via pitch of 10 &#181m with little contact resistance where stacked vias are bonded. For more on this research, read IMEC Demonstrates 3-D Stacked IC Integration. IMEC is always worth watching for updates and progress in the field. An interesting parallel announcement out of Japan described work by NEC, Elpida, and Oki Electric with polysilicon vias for 3-D interconnections. This development is featured in TSV Research Yields Packaging Technology. An interesting debate is how much all of this activity will settle on a small number of different approaches.

SEMICON Japan’s annual highlights include the Akira Inoue Award ceremony, where a prominent figure in the industry is recognized for contributions to protecting and promoting the environment, health, and safety. Inoue was long-time president of Tokyo Electron Limited and known for his dedication to these issues. The award, now it its seventh year, was given to Chang-Gyu Hwang, Ph.D. I was at SEMICON Japan for the first award in 2000, and am glad to see that this has continued as a high-profile event. Japan has been at the forefront of addressing environmental and related issues in the semiconductor industry. For a full summary of SEMICON Japan, see The News from SEMICON Japan.

And speaking of the environment &#151 please check out the column The Perils of RoHS in the November issue of Advanced Packaging, by contributing editor George Riley. He dug into some details of the reality of eliminating lead from solder in the electronics industry. A key finding &#151 lead-solder replacements such as tin/silver/copper have a more negative impact on the environment when you consider a full range of factors including energy use, global warming, ozone depletion, photochemical smog, water quality, and public health. It would have been nice if the industry could have done those detailed studies that George reports on several years ago, so that there could have been some more informed decisions about what path(s) to follow to decrease the environmental impact of the electronics industry. People seem resigned to accepting the current RoHS regulations, but we can learn some lessons from this whole process for the next politically fueled issue that affects our industry.

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