What’s holding up FinFETs for 45nm?

by Ed Korczynski, Senior Technical Editor

After my last blog entry, based on an interview with an Infineon scientist, in which I implied that the company may use finFETs at the 45nm node for low-standby power (LSTP) circuits, Infineon subsequently told me that I’d mistakenly read between the lines, and that they agree with the rest of the industry that finFETs will not be used until the 32nm node. Yet if finFETs provide double the battery life without significant manufacturing costs or yield losses, then why not deploy them earlier? Is it really already too late to choose a 45nm LSTP transistor manufacturing technology?


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