February 12, 2007 – As a teaser for announcements it’s making at this week’s Integrated Solid State Circuits Conference (ISSCC), Intel Corp. says it’s developed a futuristic programmable processor with a single 80-core chip that achieves “teraflops performance” (trillions of calculations/sec), and consumes just 62W of power, less than that of some of today’s single-core processors.

The chip is made with a tile design in which smaller cores are replicated as “tiles,” making it easier to design multicore processors — a single-core chip of this size (100 million transistors) would take twice as long with twice as many people to design, the company said. Also, each core contains a five-port messaging passing router, connected in a 2D mesh interconnect scheme, creating a “network-on-a-chip” architecture that allows super-high bandwidth communications between the cores. And each individual compute engine and data router in each core can be activated or put to sleep independently so that only ones needed to complete a task are used. Other improvements in the chip are incorporated in sleep transistors, esochronous clocking, and clock gating. (See summary of performance results below.)

Intel emphasized that this is purely a “research chip,” and the company has no current plans to bring “this exact chip designed with floating-point cores to market.” However, it did say that the chip has “offered specific insights in new silicon design methodologies, high-bandwidth interconnects and energy management approaches.”

Further “tera-scale” research will involve developing more prototypes with general-purpose Intel Architecture-based cores, and adding 3D-stacked memory.

By the numbers — Intel’s research chip results

Frequency……..Voltage………Power…….Aggregate bandwidth…….Performance

3.16 GHz………..0.95 V…………62W…………1.62 Terabits/s…………1.01 Teraflops
5.1 GHz………….1.2 V………….175W…………2.61 Terabits/s…………1.63 Teraflops
5.7 GHz………….1.35 V………..265W…………2.92 Terabits/s…………1.81 Teraflops

Source: Intel Corp.