IST Project Promises VERTIGO

(February 7, 2007) AGRATE, Italy &#151 The EU’s strategic targeted research project, Verification and validation of Embedded System Design workbench (VERTIGO), proposes a broad aim of maintaining competitive status in the embedded-systems sector for the European electronics industry. The project’s multi-pronged approach includes improving modeling synergy, developing validation techniques for designs that integrate various flows and also transfer to simulation, and prototyping a co-verification environment.


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