February 16, 2007 – Researchers at the U. of California-Riverside have designed the building blocks for a memory device that uses telescoping binary or three-stage carbon nanotubes as high-speed, low-power microswitches.

The design, from Qing Jiang, professor of mechanical engineering at the Bourns College of Engineering, and co-author Jeong Won Kang, involves inserting a hollow nanotube closed at both ends inside a larger one that is open at both ends — creating a telescoping motion using an electrostatic charge. Contact between the nanotube and electrodes creates a conduction pathway with three possible positions (see image, below).

“One of the biggest problems for the current non-volatile memories (such as flash memory) is their low speeds,” said Jiang, in a statement, adding that this new device has been simulated with switching times of around 10-11 se, and data erasing times of around 10-12 sec.

Future research is needed to select the proper electrode materials, and address the “rebound” of the nanotube actuator on the electrode. The research is presented in the March 7 issue of the journal Nanotechnology.

Photo: General design of the multi-walled carbon nanotube-based nonvolatile memory device in its neutral position (a); position 1 (b); position 2 (c). (Source: U. of California-Riverside)