Nanoimprint lithography presses into manufacturing markets

By Tom Cheyney
Small Times Contributing Editor

Mar. 8, 2007 — While many of the 4000-plus attendees at the recent SPIE Advanced Lithography event in San Jose focused on the latest developments in immersion, double patterning, and extreme ultraviolet technologies, a growing legion of supporters of the leading alternative nonoptical approach&#8212nanoimprint lithography (NIL)&#8212presented their case.

“The real reason our customers are buying imprint tools today [is because] it has unparalleled capability at 32 nm and below,” claimed Mark Melliar-Smith of Molecular Imprints (MII) during his plenary session speech. “The technology is [also] unique among next-generation lithography technologies, past and present, in that it is cheap enough, fast enough, and flexible enough that it can be used for things other than CMOS.”

During an evening panel on metrology and materials for NIL, moderator Chris Soles of NIST noted that the “key to nanoimprint’s success is for it to work in other fields, giving time for the CMOS applications to develop and propagate.” In addition to a worldwide installed base of a few hundred commercial and custom-built R&D systems, there are imprint-enabled production lines serving certain optics and photonic crystal markets as well as unit-process development and device prototyping tools being used by flash memory and other advanced CMOS manufacturers.

Potential markets for NIL include sub-32-nm CMOS, post-CMOS devices, high-brightness LED, storage media, MEMS, flat panel displays, flexible electronics, and biomedical devices. The patterned storage media sector, characterized by Melliar-Smith as a possible “multibillion-dollar [imprint tool] market over the first half of the next decade,” will soon hit “one of those [technological] brick walls,” Hitachi Global Storage‘s Tom Albrecht told the panel session. To make the complex nanoscale patterns required on future disc media, he said “nanoimprinting could play a very important role,” adding later that “we are not talking about any alternatives [to NIL].”

The nanoimprint “infrastructure is there, and is developing at a nice rate,” said Larry Koecher of toolmaker Nanonex. His company, like some of its fellow equipment vendors, also has a growing NIL photoresist business. Other imprint tool suppliers include MII, EV Group, Suss, and Obducat.

Sweden-based Obducat, one of the first companies to commercialize NIL, has more than 60 R&D systems installed, making it “by far the largest single vendor of R&D tools,” said Ken Mason, Business Development Manager North America. In February, Obducat launched its SindrĂ© production tool line, which can handle substrates of up to 200 mm, features throughputs of 30 wafer levels per hour, decreases contamination levels, and increases master stamp life, he said.

While NIL has made significant progress, both in terms of technological and infrastructure development, many daunting challenges remain. Templates play a critical role in nanoimprint’s ability to achieve single-digit-nanometer resolution. Although fabricated in much the same way as photomasks, templates have a different form factor than regular masks, cannot be properly inspected with available mask tools&#8212employing 1X wafer inspection tools as an interim solution&#8212and require manufacturing write-times that can stretch into days for each substrate.

Mask houses such as DNP, Hoya, and Toppan, smaller suppliers such as Transfer Devices, Danish startup NIL Tech, and Benchmark Technologies (with its Holographics partner), and the imprint tool companies themselves are among the companies fabricating or replicating molds and templates.

Although some imprint skeptics point to inadequate overlay and throughput performance, defectivity remains the major obstacle in NIL’s path to success in CMOS and other nanoscale high-volume manufacturing. In a paper delivered during the conference, MII’s S.V. Sreenivasan discussed ongoing studies of imprint-specific defects on his company’s step-and-flash tools. The results showed “excellent progress made over the past three years,” he noted.

Template defects have been driven down to <0.1 per square cm and imprint defects to <1.0, but both metrics must reach <0.01 per square cm. Still, Sreenivasan believes "there are no fundamental issues seen that could prevent nanoimprint lithography from reaching the desired defect density goals for sub-32-nm half pitch."

NIL’s progress resembles that of an earlier disruptive chipmaking technology&#8212chemical-mechanical polishing. Much as IBM did for CMP in the 1980s, MII’s John Doering believes that nanoimprint needs “an industry champion who’s willing to be vocal and public, and support and nurture the technology, until it is clearly required across the board.”

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