Samsung ramps 60nm DRAM production

March 2, 2007 – Samsung Electronics Co. Ltd. says it has ramped to mass production of 1Gb DDR2 DRAM using 60nm process technologies, which it says offers 40% production efficiencies vs. 80nm shrinks the company has deployed since early 2006.

In a statement, Samsung said it expects “ample market availability” of 1Gb DRAM to increase demand for large-density DRAMs, citing increased system memory requirements for Microsoft’s new Vista operating system.

The 60nm DRAM chip utilizes 3D design with selective epitaxial growth, and proprietary “recess channel array transistor”. (A 50nm version of the DDR2 DRAM chip, in the works for a year and slated for mass production in 2008, offers 55% improved production efficiency vs. the 60nm process shrink, the company claims.) In December Samsung said it has developed a monolithic 1Gb mobile DRAM memory using 80nm process technology, and expects to ramp to mass production by 2Q07.

Most recent scaling announcements from Samsung, however, have been for NAND flash devices. In January the company announced sampling for 50nm-based 16Gbit NAND flash memory devices, with mass production slated for sometime in the current quarter (1Q07). Back in July Samsung said it had ramped to volume production of its 8Gbit NAND flash memory based on multilevel cell (MLC) architecture and 60nm process technologies, two years after announcing development of the technology.

In September 2006, Samsung said it created a 32Gb NAND flash device using 40nm process technologies, featuring a “charge trap flash” (CTF) architecture that “sharply” reduces intercell noise levels, and enables higher scalability to enable transition from 40nm to 30nm and even 20nm processes. And two months earlier, Samsung qualified its 65nm low-power process technology at its S1 300mm logic fab line in Giheung, Korea, and ramped to volume production of its 8Gbit NAND flash memory based on multilevel cell (MLC) architecture and 60nm process technologies, two years after announcing development of the technology.

Also in September, Samsung said it has completed a working prototype of phase-change random access memory (PRAM), seen as a replacement for high-density NOR flash memory within the next few years. The 512Mbit PRAM device was developed by using vertical diodes with the 3D transistor structure Samsung currently uses to produce DRAMs.

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