by Ed Korczynski, Senior Technical Editor
David Bergeron, having spent 20 years at IBM in DRAM and logic fabs at Burlington, and leading Silicon Valley start-up Candescent, and being a VC for Tallwood Ventures, is bullish on the fab business outside of mainstream CMOS. He’s so bullish that he’s taken on the CEO role at newly independent Silicon Valley Technology Center (SVTC), after its purchase March 8, 2007 by Oak Hill Capital Partners and Tallwood for $53M.
Opened in mid-2004 by Cypress Semiconductor to do 65nm R&D, SVTC was always conceived of as a place for companies to pool resources and share costs in process development. Pure research may be done in a lab, but technology development for manufacturing requires investing in a fab, or at least renting a portion of a fab. American Semiconductor developed an SOI CMOS process there in 2005, and Cavendish Kinetics developed and characterized embedded non-volatile memory technology compatible with standard CMOS in 2006.
“In the last year or two at Tallwood Venture Capital, we’ve seen an explosion of fabless business models using not just new designs but new structures,” said Bergeron in an interview with WaferNews. “Companies are implementing solutions for both consumer and business applications that do not rely upon just extending CMOS.” As an example, new materials allow for the creation of MEMS-based non-volatile memories.
The “specialty” foundries such as X-fab and Jazz have to do cost-effective technology development. While they would like to get into new structures, the cost implications typically demand advanced projections of high volume, so there is demand for a place to do R&D to pilot production of unit processes through integrated process modules. SVTC currently counts 21 customers working with 200mm wafer production equipment, including chip companies, as well as OEMs and materials suppliers. Bergeron says that the customer base has been growing just by word-of-mouth, and he expects to keep adding new technology capabilities such as MEMS and photovoltaics.
SVTC’s business model is unique in that there seems to be almost no minimum commitment to take advantage of its capacity. Some customers may have 40 engineers, while others may have only five, depending on their level of engagement. A customer can buy time on a tool operated by SVTC people, or just get a certain number of wafers run. They can partner or contract to get specific processes developed. They can go as far as buying a specialized piece of equipment and leasing exclusive space for their access only. There are certainly minimum charges, including costs to clean and re-set tools to normal baselines after use.
“In a research environment, people often run equipment and then just leave it,” explained Bert Bruggeman, SVTC vice president of operations and general manager. “We run the tools under statistical process control like a real fab, and we use a contamination review board to minimize the risk of working with new materials.”
Care in managing new materials is crucial to SVTC’s future, since ~30% of today’s customers work in MEMS, and ~20% in photovoltaics and SiC power chips, and biological applications also entail borrowing technology from CMOS. “We’ve seen close to a dozen companies that have appeared within the last year, for example, working on DNA micro-array analysis,” informed Bruggeman.
SVTC also provides 200mm and 300mm wafer services, typically for companies that don’t need the capacity of a full production machine yet require the precision of nanoscale manufacturing. They commit to cycle times and run wafers. For example, Novellus is a customer for lithography wafer services.
“I don’t know anybody with the exact operations and IP model,” said Bergeron. “Most of the alternatives require you to share the IP to join the club. We’re break-even today, but spinning out of Cypress will allow us to grow the business fairly quickly using this model.” -E.K.