TSMC and NEXX Systems form JDP for Cu plating

March 14, 2007 – Packaging equipment developer NEXX Systems has entered into an ongoing joint development program (JDP) with Taiwan Semiconductor Manufacturing Company Ltd. (TSMC).

The JDP represents a collaborative effort to assess, develop, optimize, manufacture, and/or market electrodeposition processes using NEXX’s Stratus system, including through silicon vias (TSV), wafer-level chip-scale packaging, and redistribution layers. In support of this effort, NEXX will both deliver a Stratus 300 automated electrodeposition system to TSMC’s Fab 7 in Hsinchu and provide process development experts to carry out the development work in conjunction with TSMC’s local experts.

“The Stratus will provide TSMC a proven means of filling TSVs that is both cost-effective and high yielding,” states Arthur Keigler, vice president of technology at NEXX Systems. “NEXX is pleased to participate in TSMC’s program for creating chip-stacking technologies that enable high-performance compact devices.”

The managers of the bumping department at TSMC add, “We are pleased to be working with NEXX Systems to build our capabilities for TSVs, wafer-level chip-scale packaging, especially in low-cost solutions. We recognize the unique low cost benefits with high performance the Stratus system offers for these applications.”


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