April 23, 2007 – Toshiba Corp. is planning to ramp production of NAND flash memory using 43nm process technologies in its current fiscal year, in an attempt to offset current memory price declines with projected 40% production cost reductions, according to Japanese daily newspapers. The new products are to be built at Toshiba’s fourth domestic memory fab in Mie Prefecture that will come online later this year.
Steep memory ASP declines (~-70% in 2006) have already caused Toshiba to postpone construction plans for a fifth fab, and delay anticipated production start until FY09, according to the paper, which noted that the chipmaker also has shifted resources to push from 70nm to 56nm chips to achieve some cost efficiencies to temporarily offset the low prices. Adoption of 43nm process technologies will mean about 40% more chips/wafer vs. the 56nm chips, with yield remaining about the same, the paper explained.
The paper cited Toshiba president Atsutoshi Nishida saying he thinks prices will fall another 50% this year, despite >20% growth in the NAND flash market.
Rival Samsung is expected to start making 50nm products later this year, the paper noted.