IBM uncrates 45nm eDRAM with SOI, SiGe with TSV

June 5, 2007 – IBM is rolling out four new products, including a Cu-45nm ASIC custom chip using silicon-on-insulator technology, which is also the first commercial use of embedded DRAM also implemented in SOI.

IBM says its 45nm eDRAM technology with SOI takes up one-third the space and offers one-fifth the standby power of conventional SRAM. In general, SI provides up to 30% performance boost vs. CMOS technology, the company noted.

IBM is also unveiling three other products: a SiGe BiCMOS 5PAe, based on through-silicon via technology; a CMOS 11LP (built using immersion lithography) optimized for lower device-leakage for handsets; and a “cost-optimized” SiGe BiCMOS 6WL analog chip targeting high-volume consumer applications such as mobile phones, WLAN, and GPS devices.

The Cu-45nm SOI-based ASIC will be ready in early 2008; design kits for the SiGe 5PAe will be available this summer, and for the CMOS 11LP later in the year, IBM says. Design kits for the SiGe BiCMOS 6WL are available now.


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