June 14, 2007 – Silterra Malaysia says it has signed a “joint development project” with European R&D consortium IMEC to create a foundry-compatible 90nm CMOS process technology, based on IMEC’s process, with intention to scale to 65nm (while developing a 110nm derivative in parallel). The two already had worked on 0.13-micron process technology under a deal signed in June 2004.

Researchers from both groups will “fine-tune” the 90nm process, incorporating low-k intermetal dielectric and 193nm lithography, at IMEC’s facility in Leuven, Belgium. Production-readiness is being targeted for 2H08, “or earlier,” the companies said.

“Many of our major customers adopted the multi-foundry strategy and we will continue to grow with them,” said Kah-Yee Eg, CEO of Silterra, in a statement, adding that the deal with IMEC also paves the way to a “migration path to 300mm.”

Silterra already had in-house capabilities for 0.18-micron processes for applications including RF, high voltage and low power, and is currently porting those to 0.13-micron, and will continue to move them to 90nm and 65nm, noted Eg.

Silterra’s parent company also backed IMEC fabless spinoff Essensium NV, an aggregator of SoC products, with ~