July 17, 2007 – Taking a stab at specific needs for semiconductor manufacturing using high-k dielectrics and metal gates, Applied Materials has developed a new system on its Centura platform for critical etch parameters, claiming it simultaneously delivers “smooth, vertical sidewalls with zero silicon recess and zero byproduct residue.”

The Applied Centura Carina etch system incorporates a proprietary high-temperature cathode to enable processing temperatures high enough to produce smooth, vertical profiles through the high-k layer to the substrate interface without leaving a high-k “foot” or silicon recesses in the source/drain region. The high temperatures also prevent etched material from redepositing on the wafer, and eliminate wet/dry process combinations to remove residue.

The Carina etch system is available as a standalone system or integrated into Applied’s Centura mainframe, with AdvantEdge G3 etch chambers and Axiom post-etch treatment chambers. The company says it already has multiple Carina installations at leading logic and memory semiconductor manufacturers worldwide.