DuPont, IMEC working on post-CMP, Cu/low-k beyond 45nm

July 17, 2007 – DuPont Electronic Technologies has joined European chip R&D consortium IMEC as an industrial affiliate in 45nm and 32nm technology development, participating in programs on cleaning, contamination control, and advanced interconnects.

The initial two-year program will see Dupont’s EKC Technology unit send staff to IMEC to help develop new post-CMP cleaning solutions for the Cu/low-k scaling program. In addition, EKC will utilize IMEC’s technology for testing newly developed post-etch residue removers.

The deal will enable IMEC to evaluate the performance of various EKC post-CMP cleaning solutions, and “allow us to obtain generic knowledge that can explain phenomena observed during post-CMP cleaning,” said Serge Vanhaelemeersch, department director of advanced materials and process steps at IMEC.


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