By Fran&#231oise von Trapp, managing editor, Advanced Packaging

In the past week, two announcements by FormFactor, provider of advanced wafer probe cards, illustrate the company’s pursuit to bring down the cost of test by taking IC testing upstream to the wafer level. “The only cost-efficient way to test is to test on the wafer,” stated Igor Khandros, CEO, FormFactor.

Testing a device nearer to the frontend gives manufacturers the highest value, explained Khandros. With the investment involved in stacked-package, 3D devices, and system-in-package (SiP) production, testing at the package level can result in high cost of failure. Packaging only known good die (KGD), which are tested prior to final assembly, helps improve yields and lower overall costs, he noted.

At SEMICON West, the company is announcing what it calls a “breakthrough” probing contact capable of full area wafer probing of high pin density, ultrafine pitch devices, spanning memory, logic, system-on-chip (SoC), and parametric test. The technology, based on the company’s MEMS contactor technology, is expected to provide a 10&#215 reduction in pitch and allow the probing of 1000&#215 more contacts on a 300mm wafer in a single touchdown.

FormFactor introduced MEMS-based probe cards to the market and is heavily involved in MEMS technologies and R&D, Khandros noted. MEMS technology allows it to develop structures that can withstand stresses, he noted, adding that along with probe cards, “you will see us attacking other MEMS applications.” The new MEMS contactor technology is expected to be commercial within 3-5 years.

Khandros also talked about the company’s new strategic agreement with DRAM manufacturer Elpida, in which the companies will collaborate to create a customized test-solution roadmap for Elpida. “Cost of development causes customers and vendors to develop strategic relationships to continually reduce the cost of test,” said Khandros. This is one example of how FormFactor customizes products for their customers. Beyond developing probe cards, the company develops its own design tools, and offers a range of probes targeted for wafer-level, reliability, and final test. — F.v.T.