July 18, 2007 – IMEC has expanded its 3D packaging research program to fully exploit the potential of novel 3D technologies. Besides 3D interconnection technologies developments, the program is extended with research on system design methodologies. Both the technology and design sub-programs will be based on actual system requirements and closely coupled.
IMEC develops different 3D system integration concepts, each offering specific advantages for certain application domains. Current research focuses on 3D system-in-a-package (3D SiP), based on the classic packaging infrastructure; 3D wafer-level-packaging (3D WLP), based on the emerging wafer-level-packaging infrastructure; and 3D stacked IC (3D SIC), based on foundry-level 3D technology additions. Depending on the application and the systems requirements, a specific 3D solution needs to be chosen.
In the future, IMEC intends to extend its 3D system technology program with a 3D IC program which will investigate wafer stacking for interconnects at the IC local interconnect level.
By involving other companies such as e.g. fabless companies and EDA companies, IMEC aims to develop 3D architecture methodologies enabling 3D optimization across heterogeneous technologies. The technology development sub-program and the design methodologies sub-program will be tightly coupled.
Within the design sub-program, IMEC will explore the impact of 3D integration on the design of advanced systems. Methodologies to optimally partition and stack the different parts of the system will be developed and solutions for critical design issues. This will enable effective use of 3D interconnection on the system level. Design methodologies will also be explored for heterogeneous integration of intelligent 3D sensor systems.