by Bob Haavind, Editorial Director, Solid State Technology

In one of his famous tour-de-force portraits of the progression of semiconductor technology, Paolo Gargini, Intel Fellow and director of technology strategy, linked past developments to the future in a SEMICON West keynote talk. An overflow room with piped-in video was needed to accommodate attendees.

Because of high carrier mobility, he suggested that indium antimonide (InSb) as well as germanium (Ge) might play an important role in future chips, perhaps deposited locally. He pointed out that when it became clear that ultrathin gate oxide would finally choke off traditional transistor scaling that had allowed smooth circuit shrinks for three decades, many engineers began to quake. He suggested that while physical limits do exist, innovative ideas can often find a way around them.

In developing the first semiconductor devices, for example, Shockley’s concept for using a field effect to modulate charge flow didn’t work in practice. John Bardeen showed that the problem lay in free surface states that trapped charge carriers and choked off flow. In trying to overcome this problem, the point contact transistor, a bipolar rather than a field-effect device, emerged instead.

Later, when Dennard explained scaling concepts in the early 1970s (see past references in SST/WaferNEWS here and here), hundreds of device companies emerged. Now, a new period of innovative thinking is required to push progress further. In addition to higher mobility materials, Gargini showed how a tri-gate transistor structure offers promise for dense circuits in future generations.

Occasionally Gargini showed patents from the 1920s and 1930s that presaged today’s MOS field effect concepts, and suggested that it is worthwhile to try to identify ideal device structures and mechanisms even if they aren’t yet practical to make. The struggle to overcome limits often suggests new and fruitful directions to those willing to see the potential. — B.H.