STARC taps Blaze DFM for CEL reference design flow

August 2, 2007 – The Semiconductor Technology Academic Research Center (STARC), which works with all of Japan’s major chipmakers, will use Blaze DFM for lithography simulation and analysis in its STARCAD “certified engineering linkage” (described as “one step ahead of DFM”) reference design flow, the companies announced.

The selection process involved three 65nm designs, using multiple rule sets and process windows to identify lithographic hotspots on all metal and via layers, and determine scalability using different configurations of one, two, four, eight, 16, and 27 processors.

“For many of our member companies, it is critical to be able to accurately predict the photolithographic printability of their most advanced designs,” said Nobuyuki Nishiguchi, VP and GM of Development Dept.-1 at STARC, in a statement, citing Blaze’s “fast, accurate lithographic variability analysis” and scalability and robustness.


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