by Debra Vogler, Senior Technical Editor
The logic portion (i.e., baseband) of chipsets for cell phones and other mobile communications applications has benefited from scaling, and the radio portion is already down the path of integration (going from exotic technologies to BiCMOS, SiGe, and RF CMOS). But integration has not yet found its way into the last portion, from the radio out — power amplifiers, switches, and memory management.
The lack of scaling solutions for the feature-rich portions of mobile chipsets has a lot to do with the difficulties inherent in using GaAs and other compound semiconductor materials that make them more expensive to use in manufacturing. Fueled by the demand for cell phones in emerging markets, IBM has seized the opportunity by developing a low cost, integrated solution (announced concurrent with the FSA Expo) in which multiple RF/analog functions are integrated onto a single chip.
The “CMOS 7RF SOI” technology makes use of IBM’s extensive experience with SOI, and even though the geometry being used is 0.18µm, the lithography technology is relatively advanced for the RF world and very advanced compared to what is used in GaAs manufacturing, according to Jim Dunn, senior manager, analog & mixed signal technology development at IBM’s Semiconductor Research and Development Center.
The key to the technology was being able to obtain the same electrical performance in an SOI environment as that obtained with GaAs, a typical material for communications applications. GaAs pHEMTs (pseudomorphic high-electron mobility transistors) have been the preferred solution for switches, Dunn told WaferNEWS, because of their good insertion loss, semi-insulating substrate properties (low capacitance/good isolation), and with breakdown voltages usually >12V, it is not necessary to stack very many of them to address voltage spikes or load mismatches.
If the switch function can be moved from GaAs into silicon, however, then the controller, power amplifier, and other functions in the front-end of the handset also can be moved into silicon, Dunn explained. “By using SOI as the substrate, we can take advantage of having source/drains sitting on top of a buried oxide that reduces the overall junction capacitances, improving isolation,” he said. “Electrically, we can get performance that matches the GaAs solution and finally, because in SOI, the bodies are floating, you can stack multiple devices to withstand any high voltage spikes.”
Dunn added that the devices have time constants that are very fast relative to those associated with the voltage spikes. “So we can take a stack of 2.5V devices and by putting them together, withstand a 30V voltage spike, which is what you are likely to encounter in a typical GSM phone,” said Dunn.
As phones become more advanced, there are even more multiple bands with multiple modes (i.e., fairly complex transmit and receive capabilities), so IBM’s new technology becomes more compelling — high levels of integration do not play to the strengths of GaAs, but they do in SOI, said Dunn. “As you start having more and more devices in CMOS, it’s typical to have 3-4 levels of metal to integrate more logic