by Griff Resor, Resor Associates and SST Editorial Advisory Board member
BACUS is the place to sense the pulse of this industry, and this year’s meeting was all about the 32nm node. It is clear that today’s immersion processes plus double patterning lithography (DPL) will be used to reach the 32nm node. This puts extreme pressure on image placement errors and CD uniformity.
Originally to be inserted at the 100nm node, extreme ultraviolet (EUV) lithography is still not ready and is now being targeted for the 22nm node. Meanwhile, some of the advances in image placement that are being pioneered by EUV researchers will help optical solutions. For example, NuFlare presented data on image placement errors for its latest vector scan e-beam writer, with errors of ≤6nm. Though these results were presented in the EUV mask session, they are directly transferable to optical processes. To meet its image placement goals, EUV researchers plan to measure chuck and blank flatness and predict image placement errors, which will be compensated for by writing a mask with offsetting image placements. Some of this requirement is driven by the non-telecentric illumination used in the EUV projection optics, but this method will also be needed to push DPL to its limit. For example, Prof. Engelstad, U. Wisconsin-Madison, reported that the three-point mounting used in mask writing tools can produce a 1400nm sag in a mask blank, causing 122nm of image placement error when the mask is pulled flat on the chuck in the EUV exposure tool. While these numbers change in models of an optical scanner’s mechanics, the image placement errors will still be significant and will require compensation.
Nano-imprint is running hard, and defect levels continue to improve. Acceptable template resolution for the 45nm and maybe the 32nm node was shown, with templates made with the NuFlare EBM 5000 and 6000 machines and a chemically amplified resist ZEP520A. Molecular Imprints reported details on defects causes, indicating most imprint defects happen when the template steps on a particle on the wafer. Still, imprint progress is not moving fast enough to displace optical lithography at the 32nm node in 2009, leaving the industry only one alternative — to push optics.
Several ways to improve optical processes were discussed during the four-day conference. The most appealing process (called self aligned spacer & trim or SAS/T) deposits spacers on the edges of a line/space pattern, which avoids the image placement challenge since it is self-aligning. The spacers are then used as a hard mask. The result is a doubling of pitch. However, analysis shows extreme CD uniformity is required, and also this industry seldom makes uniformly periodic structures –so the spacer approach will not find general use.
Most attendees are working on ways to make double patterning lithography work. The most commonly discussed method was double exposure, double etch (DEDE). This method uses two different masks, each with the proper RET, and each exposed, developed, etched and stripped. The challenge is to place the second mask’s image in the right place; image placement errors add to the CD uniformity error. For example, if a metal line is being printed, the line can have the right CD, but the space from a metal line made with the prior mask will be in error.
The goal for image placement for masks is 3nm, and the overlay goal for scanners is also 3nm. Both systems currently have errors around 6nm, but the systems appear to be very well controlled, and most BACUS attendees were optimistic that progress over the next year or two will bring the industry to the tolerances required at the 32nm node. ASML pointed out that random mix-and-match of scanners may need to be discontinued for critical levels. Two papers showed significant improvements in image placement using Hoya’s new “stress free” mask blanks.
CD uniformity challenges received almost as much attention as image placement. CDs must be fabricated with errors less than 3nm, and this requirement moves to 2nm over the next few years. A charge removal layer appears to be necessary on mask blanks. Several papers presented CD results using 10nm of chrome over MoSi. The chrome is used as a hard mask to control etching of the MoSi layer. The results look very good.
Mask etching problems remain — e.g., “micro-loading” of reactant gases creates different etch rates depending on the mask pattern. One approach discussed at BACUS involves modeling the “etch proximity effect” and programming different mask CD’s to compensate, but this is a complex way to solve the problem and could slow process improvements at etch. A novel alternative, presented by Pixer, takes CD uniformity error data and writes a “shading” pattern into the mask blank using quick pulses of laser light to form scattering sites behind the mask pattern. Pixer’s data on CD uniformity improvements in wafer images looked good, though the impact on image placement was not known. Both methods rely on a stable etch process to minimize the data collection challenge.
Reticle haze has been a persistent defect problem for 193nm masks. A few years ago at BACUS the first analysis of these defects was reported. Ammonia combines with water and sulfur to form crystal patterns on the mask. Once these chemicals were identified in the maskmaking and cleaning processes, a major effort was launched at maskmakers to change processes and reduce these elements, but surprisingly, this effort did not make a significant change in the problem in production fabs.
Two papers at this year’s BACUS conference provide the solution. Entegris showed that haze growth can be stopped by keeping water out of the mask environment, and the maskmaking, storage, transport, and scanning environments must all be controlled. Meanwhile, Toppan presented a production fab experiment in which they put clean witness plates in fab environments. After 25 days they found growth of ammonium sulfate crystals, even though these plates had not been through a maskmaking process. They reported that 50% of the particles in a fab environment are ammonium sulfate. Water and 193nm light are needed to initiate the deposition process. The exact mechanism is unknown, but it is clear that protection (no water) in the fab is the solution.
As features shrink, there is concern that e-beam mask writers will not provide the resolution, or will have to make a severe tradeoff on throughput. An ion beam system from IMS Nanofabrication looks like a viable alternative. The IMS system uses multiple parallel beams of argon ions to write mask patterns. SEM results were impressive — 22nm line/space patterns looked great, 16nm patterns were believable, and 11nm line/space patterns were visible. Ions are easier to control, so this offers the promise of higher resolution without loss of throughput. IMS demonstrated that their system can be used to ion mill nano-imprint templates directly, and showed SEM pictures of a 3D microlens array ion-milled on a GaAs chip.
In summary, today’s immersion scanners will be pushed to the 32nm node using double patterning lithography. The challenges of image placement and CD uniformity will not be show stoppers. Only incremental improvements are needed. These improvements are in development now. Mask blanks, e-beam writers, resists, inspection tools, and repair tools are moving at the required pace. Two innovative tools that will help sustain the future pace of this industry made their debut at BACUS. Pixer presented a tool to compensate for mask CD uniformity and fix etch problems. IMS Nanofabrication described early results with their ion beam writing tool, a tool that may side step the anticipated loss of throughput with e-beam writers as CD’s continue to shrink at the pace described by Moore’s Law. G.R.