Infineon, ASE tip new “eWLB” chip package

November 12, 2007 – Infineon Technologies says it has developed a new packaging technology in collaboration with Advanced Semiconductor Engineering Inc. (ASE) that offers “an almost infinite number of contact elements” in a 30% smaller package form vs. conventional lead-frame laminate packages.

“Our trend-setting package technology sets the benchmark in integration level and efficiency,” said Hermann Eul, Infineon board member and head of the firm’s communications solutions business group, in a statement.

The new technology, “embedded wafer-level ball grid array” (eWLB), targets complex chips such as those used in modems or mobile communications that require a lot of solder connections with standardize contact spacing in a minimal footprint. With eWLB, all operations are performed highly parallel at wafer level, with concurrent processing of all chips on the wafer in one step, the companies explained. As many solder contacts as needed can be added, as well as additional wiring area around the chip proper for new space-sensitive applications, they noted in a statement.

First components of the new packages, which are being manufactured at sites from both Infineon and ASE under a licensing model, are expected to be available in late 2008.


Easily post a comment below using your Linkedin, Twitter, Google or Facebook account. Comments won't automatically be posted to your social media accounts unless you select to share.