KLA-Tencor’s WaferSight2 sees wafer nano-topo

by Ed Korczynski, Senior Technical Editor, Solid State Technology

With lithography depth-of-focus specs pushing on other areas of technology, one area that has taken up the slack is the starting silicon wafer’s planarity. KLA-Tencor shows data that wafer flatness of ~100nm at 130nm has dropped to ~50nm for 45nm node processing. “Maybe you need to think about your starting material in terms of managing your depth-of-focus,” opined Dan Lopez, director of marketing for the company’s ADE division. This bare wafer metrology business primarily supplies wafer manufacturers, though devicemakers constitute~10% of the total demand, using ADE tools for incoming quality control (IQC). KLA-Tencor claims 95% global market share for new bare wafer metrology tool sales.

Another area of recent concern for manufacturing at advanced nodes is minimizing a nanometer scale surface change seen within the outer 5mm of a wafer, termed edge roll-off (ERO). “For DRAM guys, it’s purely driven by slim profits and the further to the edge they can make chips is a lot of the potential profit. For logic guys they’re typically performance driven and ERO can affect both CMP and lithography,” explained Jerry Liu, product marketing manager for WaferSight. “What people can do is partially limited by the metrology, too.”

Thus the company has ushered in its upgraded WaferSight2 metrology system, with higher spatial resolution (0.2mm from the 0.5mm) than its predecessor, allowing greater ERO resolution in terms of ZDD (Z-height double-derivative, in units of nm/mm/mm) which is the parameter that most closely tracks IC performance. The WaferSight2 gauge reference flat assembly holding the interferometric optics has been resigned for both reduced particles and improved maintenance and mechanical stability. Upgraded optics that go along with the upgraded stability of the gauge assembly allow for the higher resolution and improved tool matching (200% tool-to-tool improvement vs. WaferSight 1).

A single measurement collects all of the following without the wafer flipping: frontside and backside nanotopography, wafer shape, flatness, and ERO. The higher resolution of WaferSight2 allows nanotopography capability, which had formerly required inclusion of a separate tool (such as KLA-Tencor’s Nanomapper) to measure both sides simultaneously. “People have asked us for years to provide an integrated solution, and with the recent technology breakthrough we can now do it,” said Liu. “It’s a next generation tool, with improved cost-of-ownership.” Beta tools have been out (Soitec reportedly is an early customer), and some production orders have been received. — E.K.


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