March Events in 3D

BITS Workshop Speakers Address Advanced Packaging

MESA, AZ – Setting the tone for the 9th annual BITS Workshop, March 9-12, Mesa, AZ, with a presentation entitled “Packaging & Assembly in Pursuit of Moore’s Law and Beyond”, keynoter Karl Johnson , Ph.D., V.P and senior fellow at the advanced packaging systems integration laboratory, Freescale Semiconductor, will address new challenges, trends in packaging and assembly, and some unique solutions including system-on-chip (SOC) , 3D, system-in-package (SiP) and wafer-level assembly. Additionally, invited speaker, Belgacem Haba, Ph.D.Fellow and CTO of advanced packaging and interconnect, Tessera Inc. will discuss different alternatives available for 3D packaging as well as new ideas planned for the mobile phone revolution to continue in his presentation titled “Catching the Mobile Wave: Packaging is Going 3D.”

The BITS Workshop provides a forum for the latest information about burn-in and test socketing, and related fields. This year’s three-day event is divided into focus days: Operations Day, Challenges Day, and Design Day. Session topics range from fine-pitch PCB challenges, to socket cleaning, thermal issues, innovative contact techniques, challenges and trends in socket design, and high frequency developments. Advanced Packaging and Connector Specifier magazines are sole media sponsors. For details visit AP.

3DASSM Consortium Hosts Industry/Academia Workshop

ATLANTA – A series of industry/academia workshops begin March 11-12, 2008 at Georgia Tech to introduce the launch of the 3D All Silicon System Module (3DASSM) Consortium. Initiated by the Packaging Resource Center at Georgia Tech, (PRC), Fraunhofer IZM, and Korea Advanced Institute of Science and Technology (KAIST), this consortium proposes partnership between global companies in Europe, Asia, and the U.S., and global academic leaders .

Organic substrates have reportedly reached their limits in wiring density, cost, and thermo-mechanical properties such as warpage and thermal management. Advances in Si wafer as the substrate, with through silicon via (TSV) and embedded thin film components, in addition to its outstanding intrinsic thermal properties such as TCE and thermal conductivity, may allow part or the entire system to be made of silicon.

The 3DASSM consortium proposes to go beyond R&D and will focus in 6 major areas includinge electrical and thermal design; low-cost TSV; multi-layer Si substrate; IC-to-silicon substrate to board interconnections, bonding, and assembly; embedded thin actives and passives with better properties; and advanced thermal solutions.

Speakers include consortium co-chairs, Rao Tummala, Ph.D. (PRC); Herbert Reichl, Ph. D., and Joungho Kim, Ph.D. (KAIST) and many others. Two other workshops are planned before official launch in fall 2008, May 5-6, 2008, in Germany; and July 10- 11, 2008, in Korea. For more information or to register, visit AP

Everett Charles Technologies to Present at BITS

POMONA, CA – Everett Charles Technologies will present papers at three veues during the BITS Workshop, March 9-12, 2008. The company’s participation includes a Hot Topic Session and a poster session on Challenge Day, March 11; and a presentation during the final session on Design Day, which focuses on high frequency developments.

The Hot Topics Session highlights work that covers emerging high-focus themes. Three subjects receiving attention include contamination, wafer scale test and advanced modeling and simulation techniques/methods. The paper presented by Jim Brandes, product manager, ECT, contrasts the traditional method of testing devices, first at the wafer level and again after packaging, to a method of testing packaged devices once at the wafer level. Additionally, in the poster session, Brandes will describes tests that are problematic using a single-contact arrangement, and will explains why these tests can be performed more accurately using a Kelvin contacting approach.

Ryan Satrom, electrical engineer, ECT, will round out the company’s presentations with his paper, “From Single-Ended to Differential”, which demonstrates the importance of understanding how differential signaling affects contactor design. AP

2008 IMAPS Device Packaging Features 3D Workshop

SCOTTSDALE, AZ — 3D packaging dominates the program at the 2008 IMAPS Device Packaging Symposium, March 17-20, 2008, in, Scottsdale, AZ. Beginning with a half-day professional development course on the 17th, technical sessions fill out the track for the remaining three days and is capped off with a 3D panel discussion on Wednesday evening. Other tracks focus on trends and emerging technologies in flip chip, wafer level /chip scale packaging, MEMS, and biomedical.

Technical presentations in these 5 topic areas cover a full range of issues from new developments and materials through manufacturing and reliability. The professional development courses offered are also focused on these areas of microelectronics. 3D panel discussion topics cover 3D technology platforms (SiP, PoP, die-stack, die-wafer, wafer-to-wafer and device-by-device), unit processing technologies and equipment/material capabilities, and future trends and technology drivers. Moderators of the panel are James J.-Q. Lu, Rensselaer Polytechnic Institute; and Christo Bojkov, MAXIM.Opening remarks will be delivered by Phillip Garrou, Microelectronic Consultants of NC.

The Global Business Council (GBC) will co-locate its Spring Conference March 16-17, focusing on the business aspects of these technologies. Keynoter, Bill Bottoms, CEO, NanoNexus will discuss the 10th Anniversary Edition of the International Technology Roadmap for Semiconductors (ITRS). Session chairs of the meeting are Gary Nicholls, OEM marketing manager, Cookson Electronics and Lee Smith, senior director of business development, Amkor Technology, Inc. Presentations include a microelectronics industry overview, a session on cost-driven challenges and one on performance driven challenges.

Opportunities to network include the opening reception, meals, and other social events. For a schedule of both events, visit and AP

Names in the News

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FormFactor, Inc. hired Kirk Hasserjian, 24-year veteran of Intel Corp., as senior VP of global manufacturing. Reporting to Richard Freeman, FormFactor’s senior V.P. of operations, and Mario Ruscev, FormFactor’s president, Hasserjian will manage all manufacturing operations globally, as well as oversee FormFactor’s facilities and environmental health and safety groups.

At Intel, Hasserjian held a variety of management roles including V.P of Intel’s flash memory group and director of California technology and manufacturing. In this role, he was responsible for leading Intel’s Flash memory technology development activities in NOR, NAND and future non-volatile memory technologies. He also held several technical and management positions in Intel’s D2 development facility, including 5 years as plant manager Hasserjian holds a BA in chemistry from the University of San Francisco and an MA in chemical engineering from Stanford University in Palo Alto, CA.

Guilherme “Bill” Cardoso, Ph.D., was appointed president of Aguila Technologies Inc., provider of custom chip packaging services. Cardoso joined Aguila Technologies Inc. as VP of Technology in February, 2007, bringing with him an extensive background in high-speed sensor systems design, and fabrication and manufacturing management experience. He joined the company from Fermi National Accelerator Laboratory in Batavia, IL, where he led the electronics systems engineering department in projects that challenged the frontiers of high-energy science. Prior to Fermilab, Cardoso was founder and CEO of Robotec Automation Systems of Porto Alegre, Brazil, which provided technology and business automation manufacturing services to manufacturers. Cardoso has an MBA from the University of Chicago Graduate School of Business.

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Endicott Interconnect Technologies, Inc. named Sharon Pinto V.P. human resources. In this role, Pinto is responsible for leading the company’s human resource programs along with safety and health initiatives. Pinto has held a variety of leadership roles within the U.S. and internationally at high technology companies, most recently as V.P., human resources at Entegris/Mykrolis Corp. Her expertise in organizational development,including building and implementing performance based systems, talent aquisition and training programs, along with mergers and acquisitions and cultural change management, will reportedly facilitate EI’s plans and strategies for growth.

Pinto holds an MA in human resource management from Suffolk University in Boston, MA and a BA in psychology from Reading University in England.

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Steven Ratner has been appointed to the position of West Coast regional sales engineer Heraeus, Contact Materials Division. Ratner will be responsible for technical applications support and sales for customers in the western United States and the related Mexican border areas. Prior to joining Heraeus, Ratner held technical sales and application engineering positions in the electronics and semiconductor industries with Universal Instruments Corp., Citizen Watch Company, Vision Engineering and Mohave Instrument Company. Ratner holds degrees from California State University, Long Beach.

Semiconductor industry veteran Yuichi Meguro has joined i2a Technologies (formerly IPAC), integrated circuit assembly and packaging provider, as process/yield enhancement manager. He reports to Fredrick Solomon, director of the design and engineering section, who noted Meguro’s knowledge of wire bonding as a great asset to i2a.

Prior to joining i2a, Meguro served with NEC Semiconductors, Singapore

Pte., where he was responsible for all wire-bonding-related technical issues, process and yield improvement for NEC’s product lines. A 28-year industry veteran, Meguro served as applications engineer for the wire bonding section of the Kaijo Corp., Japanese maker of highly automated, precision wire bonders. His Kaijo posts included branch manager of Kaijo’s Singapore office, two years in the San Jose office, and in the overseas sales department of Kaijo in Japan, responsible forthe European and U.S. markets.

Hymite AG, developers of miniature silicon packaging for light emitting diodes (LEDs), appointed electronic packaging veteran Josef Kiermeier as director of business development. He will be responsible for expanding the company’s customer base among electronics suppliers worldwide and reports directly to Claus Nielsen, CEO Hymite.

The appointment builds on Hymite’s strategy of providing ultra-small packages to the high-brightness (HB) LED industry for use in a variety of applications. Nielsen says Kiermeier’s business and technology background, coupled with his experience in the packaging industry, make him the best candidate reach the company’s target markets.

Prior to joining Hymite, Kiermeier held various positions with Schott including director of sales and business development for the electronic packaging business unit in Asia. He holds an MBA from University of Applied Sciences at Landshut, Germany.

Landrex Technologies, Inc. global test solutions provider of test and test automation systems, promoted Lyle Sherwood to the position of V.P. and technical director. He previously served as sales and marketing manager for North America and Europe. In addition to sales and marketing responsibilities, Sherwood will define and coordinate new technology development in these two key market areas. He has been involved with the Optima AOI product line and with Landrex since 1998. AP

Seri Lee, Ph.D., Joins Advisory Board

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NASHUA, NH – The editors and publisher of Advanced Packaging are pleased to welcome Seri Lee, Ph.D., CTO, Nextreme Thermal Solutions, to the magazine’s editorial advisory board.

Prior to joining Nextreme, Lee served as senior thermal scientist at Intel Corp. where he was responsible for developing and executing the corporate platform thermal technology roadmap, as well as providing thermal solutions for consumer products. He is an active member of the ASME K-16 Committee on Heat Transfer in Electronic Equipment and the IEEE/SemiTherm Executive Committee.

Lee brings over 24 years of thermal management experience to the board; he served as manager of thermal characterization, Amkor Technologies, director of advanced thermal engineering, Aavid Thermal Technologies, and at the University of Waterloo in Ontario as assistant professor of mechanical engineering. He has organized numerous technical programs and sessions, published more than 60 technical papers and holds 16 patents covering a wide range of thermal issues in electronics. AP

MEMUNITY Workshop on Wafer-Level MEMS Testing

DRESDEN, Germany–MEMUNITY will hold ts eighth workshop, “Critical Success Factors for Commercialization: Production Test of MEMS at Wafer Level”, March 13 at the Institute for Microelectronic and Micromechanical Systems (IMMS) in Ilmenau, Germany.

To bringing MEMS devices to market quickly and at competitive prices. many manufacturers and designers are looking at the test process for potential efficiency gains. Typically, MEMS are tested only after packaging, a lengthy and expensive process. Additionally, most test stimuli and measurements are purely electrical, ignoring the unique non-electrical characteristics of MEMS such as pressure, motion, and temperature.

Testing MEMS before the packaging process provides data for design feedback quicker and without the wasted costs of packaging. Furthermore, there are proven solutions that test both the electrical and non-electrical characteristics of MEMS at wafer level.

At the MEMUNITY Workshop, engineers and researchers from leading MEMS manufacturers and research institutes such as Infineon Technologies, X-Fab, and the Fraunhofer Institute will give technical presentations about their current challenges and solutions in wafer-level production test of MEMS. Demonstrations of actual wafer-level MEMS test equipment will be offered as well as a tour of the facilities at IMMS and the Technical University of Ilmenau. AP


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