E-beam, nanoimprint, and novel lithographies approach semiconductor mainstream

by Tom Cheyney, Senior Contributing Editor, Small Times

Although double-patterning immersion and extreme ultraviolet (EUV) lithography may be the next-generation approaches currently favored by the semiconductor industry for scaling down the technological roadmap, several other technologies have made significant progress and could emerge as alternatives, both for future chipmaking needs as well as for high-density patterned disk media and other nanomanufacturing applications.

At the SPIE Advanced Lithography conference, presentations on electron-beam direct write (EBDW), nanoimprint (NIL), and other potentially disruptive patterning technologies drew strong attendance and elicited spirited discussion. Seagate‘s Xia-Ming Yang talked about experimental results that underscore the challenges of fabricating high-resolution master templates for bit-patterned media (BPM), the leading candidate to replace the current magnetic recording head technology.

E-beam clustering: Benefits and concerns

Electron-beam lithography, although the sole method for achieving the potential precision and resolution needed, suffers from very slow write-time throughputs that can stretch on for days, according to Yang. Other issues include e-beam tool availability, photoresist and metrology limitations, and difficulties in uniformly patterning and accurately placing the small dots that make up the magnetic BPM nanoarrays.

Once the master is fabricated, thousands of disks would be replicated from it using UV nanoimprint techniques. Despite the obstacles, Yang said that the EBDW and NIL combination “is probably the only way to go for manufacturing,” because of single-digit-nanometer-scale resolution capabilities, throughput, and cost requirements. But for the technology to achieve production worthiness, “a rotating-stage electron beam with high beam current is urgently needed for template mastering.”

TSMC‘s Burn Lin, credited with being a prime mover behind the semiconductor industry’s adoption of immersion lithography, said, during a panel discussion on massively parallel tools for nanotechnology, that multiple electron-beam direct-write systems — with their superior depth-of-focus and elimination of optics, mask CD, and overlay costs — could provide a better solution than EUVL for next-generation chipmaking requirements.

For EBDW schemes to achieve the required throughput, “obviously” they need to be clustered, Lin said. “Let’s say that I’m clustering five of the 20 wafer/hour tools. If one of them goes down, you lose only 20%; you have the other 80% going,” he explained. “If you have an [EUV] scanner going down, you lose the throughput altogether. If you cluster the [e-beam tools], there’s a chance that you can share your intrafield or interwafer data, so in this way you are saving the cost of your data processing unit.” Data rates can thus be slowed because tasks are done in parallel, he noted. “You don’t have to push for the state-of-the-art of the data transmission rate.”

Acknowledging the “real challenges” in multiple EBDW, Lin listed several concerns. “You have to worry about the brightness of the source, so you can maintain your throughput. You have to worry about those massively parallel electron optics, you have to worry about contamination of the optics, and you have to worry about data rate and the cost of electronics.”

“Not for IC lithography,” but still useful

One quite different but potentially disruptive technology, described by Zyvex Labs’ John Randall in a panel presentation: scanning tunneling microscopy (STM)-based hydrogen depassivation lithography, used in conjunction with atomic layer deposition and epitaxy processes. “Let me say right off the bat, this is not for IC lithography,” he said, acknowledging that throughput will be “abysmally small.” Still, he noted that there are useful applications, such as creating 3D top-down controlled structures in silicon, and perhaps expanding to other material systems.

“We’re using the limit of a thin resist, a monolayer of hydrogen, and just getting electron desorption of hydrogen from a silicon surface,” explained Randall. “You can drop down into tunneling range and vibrationally excite the single silicon hydrogen bond and in fact pop off individual hydrogen atoms” — which, he said, could in principle enable “absolute perfection” in lithography.

Noting that a single STM tip will be very slow, Randall said the work will focus on going parallel, using MEMS-based closed-loop nanopositioners (currently in development at the National Institute of Standards and Technology), “at first in a moderately parallel way, with [scanning probe] arrays where each individual scanner has three dimensions, three degrees of freedom, and closed-loop positioning capabilities.”

Admitting that this “will be very tough,” Randall noted that “we can look back to the last century and pull out some old tricks.” One such ploy would be “taking advantage of the silicon lattice for the in situ fiducial grid, to keep very good precision — in fact, absolute precision — not only in critical dimension but in pattern placement.” — T.C.


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