Apr. 30, 2008 – Fujitsu Labs says it has developed a technique to measure the rate of soft errors in advanced LSI chips — said to be caused mainly by neutrons by cosmic rays — in a particular location, quickly and with a high degree of precision. Details are being presented at the International Reliability Physics Symposium in Phoenix, AZ.
Both neutrons originating from secondary cosmic rays, and alpha particles originating from the breakdown of radioactive materials, can affect LSI memory and logic circuits, sometimes causing soft errors — neutrons account for 30%-80% of all soft errors, Fujitsu claims, in a statement. The impact of soft errors increases as LSIs become more closely integrated, so countermeasures to address them are becoming an increasingly important issue.
Measurements of soft error rates vary by location, since the energy spectra of neutrons is influenced by factors such as geometric latitude, altitude coordinates, and a building’s “shield effect” (i.e., structure). So, determining appropriate countermeasures to soft error rates must take into account the locations where LSIs are used. Conventional methods of assessing soft error rates using computer simulations or particle-accelerator experiments may not reflect the energy spectra of neutrons at the actual location of use, the researchers point out, so field experiments conducted at the actual location of use are essential.
The rate of soft errors depends on the energy spectra of neutrons in the atmosphere, which itself varies depending on such variables as latitude, altitude, and type of building construction — making it difficult to accurately measure the neutron energy spectra existing at actual-use sites, the scientists pointed out. Furthermore, even if 1000 memory chips are measured over the course of one year, it will only produce a range of a few to up to ten errors, making it difficult to obtain a statistically valid sampling.
So, working with the Hawaii Observatory of the National Astronomical Observatory of Japan, an inter-university research institute within Japan’s National Institute of Natural Sciences, researchers took measurements of the neutron detector (which accurately measures the intensity and energy spectra of neutrons) simultaneously with measurements of the soft error measurement system, to assess the relationship between the neutron energy spectrum and the soft error rate. Taking neutron measurements both inside and outside the building enabled evaluation of the impact of the shield effect, from structures of buildings, on the soft error rate.
The results: 36 soft errors were recorded in 1024 90nm SRAM chips over ~2400 hours of measurements less than 1/8 the amount of time required for measurements in Tokyo. Also, neutron intensity from Hawaii was 16x that of Tokyo; factoring in the effect of building “shield effect” lowered that to 7.4x. Soft error rates at Mauna Kea were divided by that 7.4 coefficient, making the amount basically corresponding to previous measurements for Tokyo as well as simulated ones.
Future work will be applied to assess soft error rates of 65nm, 45nm, and 32nm LSI devices, to provide a diagnostic tool for developing appropriate soft error countermeasures — e.g. determining whether such countermeasures are necessary, which materials to use, and what circuit types to use — even for leading-edge LSIs in which soft errors are increasing.
Soft error rate simulation: value for Mauna Kea was standardized as 1. (Source: Fujitsu)