Choosing the Best Bump for the Buck

BY TERENCE Q. COLLIER, contributing Editor

Flip chip interconnect offers the advantages of smaller footprint on the PCB, improved electrical performance, reduced manufacturing steps at assembly, and excellent long-term reliability. Unfortunately, not every die is available in a flip chip package. However, processes have been developed to convert gold and copper stud bumps to flip chip bumps. In the past, copper was selected because of embrittlement issues with Sn and Au. A proprietary technique has been developed to add a barrier layer of NiAu to thick gold (including gold stud bumps); eliminating the need for copper stud bumps and providing alternatives for thick gold on traditional wire bond pads (Figures 1 & 2).

Why Bump Single Die?

Bumping an entire wafer might not be feasible because of time and/or cost constraints. Typical cycle times can be weeks, and minimum lot charges might cost up to $30k for a single 200-mm wafer. For today’s rapid turn times and product life cycles as short as six months, bumped die need to be available in days, and at reasonable cost to fit within product development windows.

Figure 1. Pulled wire bonds show gold beneath nickel and nickel on wire bonds. Ball bonds are only on gold and copper.
Click here to enlarge image

To determine if a given die performs to specifications, a product designer typically needs a few die to build boards or modules. In some cases, three or more die might be under evaluation for the same finished product. Bumping three wafers at $30k each might be beyond the budget of small business groups. There are at least three alternatives to flip chip bumping an entire wafer. One choice is to bump single die, which is quick, less expensive, and is as reliable as bumping whole wafers. The second choice is to gold stud bump the die. The final choice is to use ”converted“ gold stud bumps.

Figure 2. This close-up view shows the gold beneath the nickel layer.
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Gold stud bumping allows for the use of thermosonic welding. An alternative to thermosonic welding is to add conductive epoxy and ”cement“ the die for electrical contact. While thermosonic is reliable and predictable, high pin counts can prove difficult for bonding to flex and PCB surfaces. Thermosonic also requires special tooling and additional assembly steps.

Conductive epoxy also requires a special assembly operation, but beads of epoxy can be dispensed repeatably and consistently for applications having 250 μm or greater pitch. Any smaller than 250 μm, and the epoxy bleeds, leading to shorts, insufficient metal load in the bead (leading to variation in conductivity), suspect reliability, and poor yield. Aging or high temperatures further reduces performance and can cause failures in the cured epoxy.

In one case study, the engineer followed a standard regiment that resulted in zero yield. Beginning with a 65-μm pad and 90-μm pitch he tried gold stud bump, followed by ultrasonic welding to the flex. Next was gold stud bump followed by epoxy which resulted in poor yield. An attempt at gold stud bump attached to pre-tinned pads lead to embrittlement as well as poor wetting, resulting in poor yield and poor reliability. The answer was gold stud bump with an under bump metallization (UBM) on gold stud with solder attach. The result was good yield add and good reliability.

To improve yield and reliability, the third alternative, adding UBM to the gold, must be chosen. Either Au or Cu stud bumping can be accomplished with a wire bonder. While Cu/Sn intermetallics are not as bad as Au/Sn intermetallics, copper stud bumping is not as easy as gold stud bumping or as widely available. Adding UBM to the gold stud bump eliminates the risk of embrittlement, allowing the use of pre-tinned pads as an interconnect for tight pitch.

Indium Solder vs. Tin-based Solders

Indium solders are typically chosen for Au stud bumps as they don’t embrittle like tin-based solders in the presence of gold. High indium solders can manage up to 20% by weight compared to 4% for SnPb based solders (and 8% for high Sn). As a rule, indium consumes gold at a rate 17


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