by Ed Korczynski, Senior Technical Editor, Solid State Technology
May 7, 2008 – Primarily driven by immersion lithography, defects on the wafer edge can transfer to the circuit areas and kill yield, and may be removed using wet etches, dry plasma etches, lasers, and mechanical abrasion. Laser edge cleaning (was patented by LSI Logic in 2005) but no commercial systems are available. Wet and dry etching of wafer edges can be purchased, but etches are inherently selective and so multiple passes are needed to remove all the layers.
Mechanical abrasion down to bare silicon seems to offer the simplest yield control. For mechanical abrasion of wafer edges, a search of the US patent database reveals several examples of prior art going back to 1994, assigned to companies including IBM, Lam Research, Chartered, Ebara, and AMD.
It is within this category of abrasion that Applied Materials Inc. today launched its Inflexion edge polishing system, at the heart of which is fixed-abrasive “polishing tape” technology, acquired from Obsidian Corp. in 1999. Using DI water with no chemical etchants, the system delivers a non-selective removal of all materials, including metal/dielectric stack residues not easily removed by etching. The system can be configured with up to three processing modules (see Figure, below), each of which includes a jig to hold abrasive tape at different angles around the edge to controllably polish the defined areas of notch, bevel, apex, and front and back exclusion zones.
Applied Materials’ Inflexion edge polishing system. (Source: Applied Materials)
“We have several patents just on notch residue removal,” noted Paul Miller, the product manager of this new system, in an interview with WaferNEWS. “Customers have told us that it’s the only effective technique to clean notches.”
The wafer is first held steady to clean the notch, and then it rotates as the jig positions the abrasive tape to remove residues and pits from any or all of the defined edge areas. Fabs can thus tailor the film-to-wafer interface to meet a wide range of integration requirements. An array of single-wafer Marangoni vertical chambers dries the wafers after cleaning.
Applied Materials claims the typical throughput for cleaning complex film stacks in a fully configured system is ~60 wafers/hour, twice that of what it calls “competing edge polishing systems” — but since Lam has chosen to use dry plasma instead of CMP for edge cleaning, the only “competing edge polishing system” today is provided by Ebara. The cost/wafer pass through an abrasive system will almost certainly be higher than that through wet or dry etchers, but since a single abrasive pass removes everything while multiple etches are needed to remove multilayer films, the overall integrated cost-of-ownership may be lower.
Inflexion systems are already in production at customer sites, demonstrating “significant yield gains in both logic and memory devices,” according to Lakshmanan Karuppiah, GM of Applied Materials’ CMP division. He added that the process is inherently “green,” since no chemistry is used with the fixed abrasive tape. And compared to dry etch tools, electricity consumption is 85% lower, cooling water is 99% lower, and only non-toxic chemistries are used. — E.K.