Oerlikon Esec Introduces Product Family at SEMICON Singapore

Kurt Trippacher, Head of Oerlikon Esec and Segment CEO, who spoke at the ceremony, said the first machines are producing in high volumes at customer locations in Europe and in Asia.

By Daniel F. Baldwin, Ph.D. and Paul Houston, ENGENT, Inc.
Current 3D packaging solutions involve a mix of high density circuit boards with stacked ICs using wire bond interconnect. With advances in wafer-thinning technology, 3D packaging now provides a robust platform for achieving high levels of integration, small package footprints, and thin package profiles. For emerging applications, further component miniaturization with the added benefit of 3D integration can be realized by face-to-face bonding of fine-pitch flip chip components and low-profile passives onto a redistribution layer (RDL) of another silicon component (a wafer level chip scale package


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