Elpida, Qimonda finalize DRAM JV

June 11, 2008 – Elpida Memory and Qimonda AG have put the finishing touches on their proposed DRAM JV, first disclosed in April, to develop memory chips with “4F2” cell sizes utilizing 40nm process technologies (ready by 2010) and later moving to 30nm. Work will be done at each firm’s respective development sites in Hiroshima, Japan, and Dresden, Germany, utilizing Qimonda’s buried wordline technology and Elpida’s stack capacitor technology.

The two firms also will explore joint development “opportunities” in through-silicon via (TSV) technology and unspecified “future memories,” as well as potential manufacturing joint activities. Also included in the deal is language for broad IP cross-licensing allowing “complete design freedom” for both sides.

“Since we started talking to Elpida, both companies have built an excellent relationship based on the common understanding of technology innovation. As such, we have been able to come extremely fast to the definitive joint development agreements,” said Kin Wah Loh, Qimonda president/CEO, in a statement. He added that the partnership structure is being realigned to emphasize Qimonda’s strategic emphasis on a non-PC diversified business model.

The Nikkei daily had previously noted that a major driver of the deal, besides offsetting rising costs of R&D and building manufacturing sites (Qimonda’s R&D strength and Elpida’s mass-production know-how are key here) is the affect of an ongoing DRAM ASP slump — both firms posted heavy losses in the past year. The paper noted that Elpida will maintain its current agreement with Taiwan’s Powerchip Semiconductor, including a ¥1.6T (~$15.42B) to build four JV DRAM plants.


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