June 25, 2008 – Samsung and Hynix have publicly confirmed that they are working to jointly develop memory technology and are forming a “united front” to maintain Korea’s status in developing next-generation semiconductors, and also support their domestic supplier base.
The news confirms reports from back in January that the two firms are working together in a state-sponsored program targeting sub-40nm process technologies. The work, to start in September, is said to focus particularly on spin-torque transfer magnetic random access memory (STT-MRAM) chips. Japan similarly has a government-sponsored program driving chipmakers (Toshiba, NEC, Fujitsu) to develop STT-MRAM.
The three-stage plan — the first Samsung-Hynix partnership since work on 64Mb DRAM in the 1990s — is part of a seven-year project launched in 2004, involving total investments of 52.58B won (US ~$55.4M), around 55% provided by the government (the chipmakers’ spending component spans 2008-2009), with hopes that the two firms will have the technologies ready for the nonvolatile memory market by 2012, to grab 40% share.
“Japanese and US rivals have been strengthening their competitiveness by striking a strategic partnerships and even the late-comer Taiwanese players are threatening us by narrowing the technology gap,” said Kwon Oh-hyun, president of Samsung Electronics’ chip business, quoted by the Korea Times at a gathering of semiconductor companies and government policymakers in Seoul. “Now it is time to join forces.”
A key catalyst for this joint effort is to develop domestic technology and avoid expensive patent licensing. Local companies pay millions of dollars annually to license foreign companies’ DRAM and NAND memory technology; the new program is expected to generate ~$500M in royalties, and ease that licensing burden (while helping improve national trade deficits too).
Samsung and Hynix also seem to have agreed on a more broad Korean chip industry collaboration involving business, research labs and government to standardize other technology areas such as wafer manufacturing equipment and materials. These efforts, which will involve tightening ties to organizations like JEDEC, SEMATECH, and SEMI, are seen to benefit smaller local suppliers that have struggled to get inroads into the major domestic chipmakers. Initial work reportedly will look at set testing systems to evaluate and certify such locally supplied equipment. And the two also say they’ll start work in August on similar standardization efforts for 450mm wafer sizes.