First issue for 450mm: Making 22nm-quality wafers is no slam dunk

by Dr. Paula Doe, Contributing Editor, Solid-State Technology

August 19, 2008 – While equipment makers and chipmakers with lower-volume runs are fussing loudly about the overall economics of moving to 450mm wafers, those actually working on developing the wafers note that just producing substrates that big that can meet the extreme levels of purity and smoothness demanded by 22nm generation devices and beyond is not going to be either easy or cheap. And now that solar makers are buying more silicon than chipmakers, the effort has to compete for silicon research dollars with developing lower-cost solar-grade production technology.

SUMCO is now in the process of investigating if it can actually produce 450mm wafers, executives in charge of the development reported to SST partner Nikkei Microdevices, but the company also will have to determine if commercial production is viable (i.e., an acceptable combination of high-quality and low-cost).

“For 450mm wafers to be viable, wafer makers have to resolve a number of problems beyond just growing larger diameter ingots,” noted Naoki Ikeda, Toshiyuki Fujiwara, and Kazushige Takaishi, in charge of the company’s evaluation, R&D and wafer technology divisions respectively.

So far, making the bigger wafers looks to have serious issues to resolve with both cost and quality. Pulling the larger-diameter ingots from larger crucibles of melt will leave much costly unused polysilicon waste behind, unless the ingots are grown long enough to use up most of the melt. SUMCO calculates that the 450mm ingots will each need to be about one ton in size to keep the materials waste to about the same level as with 300mm wafers. That means huge crystal pulling equipment, and a new support system will need to be devised to supplement the usual 3mm neck required to start the growth of the pure single-crystal ingot from which the entire ingot hangs, pulled up as it grows. Perhaps even more concerning, heating up and cooling down this much larger mass of material will take much longer, which means much lower throughput — and much higher density of defects, concludes SUMCO.

These nearly half-meter wide wafers are also going to have to be much thicker to maintain the same stability against bowing and sagging as current 300mm wafers. SUMCO figures they’ll need to be about twice as thick, or about 1.8mm. That drastically cuts down the output of wafers/ingot, and means much more substantial handling systems will be needed. It also complicates wafer thinning and 3D structures, which are already demanding fewer defects not just on the wafer surface but all the way through the wafer as well.

Moreover, new polishing or cleaning processes will need to be developed to achieve the more demanding degree of consistent nanoscale smoothness all across these larger diameter wafers, to be able to use them to make 22nm devices. Current 300mm wafers aren’t smooth enough for these next-generation features, and making a surface with even less surface roughness all across a 50% larger substrate, with more edge roll off, will be markedly more difficult. Smaller slurry particles allow polishing to smoother surfaces, but the smaller particles tend to clump together, and the clumps tend to leave deeper scratches, leaving an uneven surface topology. A better way needs to be found to keep the tiny particles evenly dispersed.

Finally, both inspection and production processes will have to be significantly improved to reduce the cost of processing larger surface areas. — P.D.


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