By V. Gektin and Margaret Stern, Sun Microsystems; and Lyndon Larson, Dorab Bhagwagar, and Jesus Marin, Dow Corning Corporation azumi Nakayoshi , Dow Corning Toray Co., Ltd.
As power levels and heat generation increase in high-performance CPUs and other semiconductor devices, the thermal performance of commonly used packaging components is becoming a limiting factor. Many such devices are mounted in flip chip packages, in which the die is underfilled on the active side and in direct contact with a thermal interface material (TIM), with a metal or ceramic lid attached on the opposite side. The lid serves as physical protection for the die as well as heat spreader and package stiffener, while the TIM helps to dissipate excess heat.
Electronics-grade silicones have a long history serving in thermal management applications, with the first thermally conductive silicone encapsulant dating back to around 1970.1 Thermally conductive silicone adhesives developed for automotive applications have been in commercial use since the early 1980s. 1 Silicone materials are frequently a choice for the polymer matrix in TIM formulations because of their flexibility and long-term stability. Able to achieve excellent wet-out for void-free contact with substrates, they have been found to contribute to greater reliability in flip chip designs, retaining their physical properties better over time than organic materials exposed to the same conditions. 1 Cured silicone is chemically stable and inherently moisture resistant, with a wide functional span between the glass transition and degradation temperatures.
With power levels steadily rising in new and emerging device designs, manufacturers are seeking improved thermal properties to ensure performance and reliability. A silver-filled silicone material specifically for TIM 1 applications (the die/lid interface) was designed to meet this challenge. Conventional silver-filled epoxies are considered to have good electrical and thermal properties, along with robust adhesion to different substrates, but their high modulus raises concerns over reliability. The newly-developed TIM adhesive combines the potentially high thermal performance of silver-filled materials, with the lower modulus and higher reliability of a silicone matrix.
To confirm the new formulation’s suitability and consistency in a manufacturing environment, while ensuring performance and reliability in the package, extensive physical testing was conducted on thermal and mechanical properties, with particular focus on adhesive bond strength and its dependence on lid material and surface finish. The material exhibited excellent stability in thermal cycling tests as well as long-term heat aging, as shown in Figures 1 and 2.
To supplement physical measurements, several non-destructive test methods were also used to locate voids or potential delamination. The ability to accurately identify defects, whether present at the time of device manufacture or after accelerated testing, was critical in monitoring the production process and confirming coverage and adhesion.
Real-time X-ray and scanning acoustic microscopy (SAM) were used extensively for non-destructive evaluation (NDE) of flip chip packages. In an X-ray shadowgraph, which is absorption driven, areas of low density such as voids appear brightest, while high-density materials such as copper appear darker. X-rays cannot be used to distinguish a delaminated interface, however.
In SAM, which functions by acoustic impedance, the near-total acoustic reflection at an air gap encountered in a void or delamination site produces a dark area in the through-transmission mode (TT or Thru-Scan) and a bright area in the reflected or C-scan mode. SAM produces the best results with crystalline materials that are homogeneous on the acoustic wavelength scale. Imaging software is available for both X-ray and SAM techniques to automatically calculate void areas over the silicon die that can be implemented in manufacturing.
To resolve potential ambiguities that can result from SAM imaging, thermal mapping (measuring the temperatures across the die area) is also an effective technique for detecting delamination at the time of manufacture or after accelerated failure testing. By taking measurements of the local chip temperature at a specified number of locations across the die and comparing results with an established model of a successful package, researchers were able to correlate aberrations with physical effects such as delamination or voiding. (Figure 3.)
A well-adhered part demonstrates higher temperatures at the center of the die, with cooler temperatures prevailing toward the perimeter. In contrast, delamination is observed by the thermal hot spots at the periphery, with cooler temperatures recorded toward the center. Cross-sections evaluated by scanning electron microscopy (SEM) were used to confirm the thermal mapping technique, corroborating evidence that the model is an effective method of predicting good adhesion and subsequent thermal behavior.2
The development and testing process for this new formulation illustrated that new interface materials selected for desirable mechanical and thermal properties may pose challenges to non-destructive package evaluation needed for product screening and reliability testing, as the limitations of any single method prevent unambiguous detection of voids and delamination. Results from both NDE and destructive analysis confirmed that this silver-filled silicone TIM1 material performs well after 260°C solder reflow, HAST, and thermal cycling. It also demonstrated robust adhesion and stability to nickel coated copper and AlSiC lids.
In developing and testing new materials for high-power chip designs, a combination of evaluation methods is presently the only way to confirm performance and processability, with NDE techniques such as real-time X-ray, SAM, and thermal mapping proving to be useful tools.
In the future, NDE techniques such as CT scanning or X-ray laminography may be needed to more accurately track package defects, particularly if the evaluation must be conducted on a functioning manufacturing line.
References:
1. M. Stefan and R. Reinders: “Silicone Thermal Interface Materials For High-Power
Automotive Applications;” Power Systems Design China; Sep/Oct, 2007; p.56.
2. M. Stern, B. Melanson, et al: “Evaluation Of and Inspection Metrology for Lid Attach
for Advanced Thermal Packaging Materials;” IPACK2007-33629; July, 2007;
Proceedings of ASME InterPACK 2007).
Vadim Gektin, Ph.D., P.E., staff engineer, and Margaret Stern, Ph. D., senior staff engineer may be contacted at Sun Microsystems, Inc. [email protected] [email protected] ; Lyndon Larson, application engineer, Dorab Bhagwagar, Ph.D., senior development specialist, and Jesus Marin, account manager may be contacted at [email protected]; Kazumi Nakayoshi Group Leader Conductives & Adhesive Development, may be contacted at Dow Corning Toray Co., Ltd.