Tony Chiang, CTO, Intermolecular, Inc., San Jose, CA USA

The current economic crisis is forcing semiconductor companies to dramatically reduce capex and opex spending, including R&D investment. While these are necessary near-term responses, a prolonged reduction in R&D investment can have long-term negative consequences, including delayed product introductions and reduced competitiveness. Increases in semiconductor R&D expenditures have steadily outpaced revenue growth because of increasing R&D complexity, shorter product life cycles, and reduced ASPs. This fundamental issue is exacerbated in a downturn.

There are now more effective alternative solutions for improving product-development efficiency and maximizing R&D return on investment. In any type of economy, chipmakers need to introduce better-performing products quickly and cost effectively. This requires iterative learning cycles relating to new materials, processes, process integration, device integration and device architecture, along with dimensional scaling — a massive phase space.

Combinatorial methodologies — proven in other industries and now available in the chip industry — can enable dramatically accelerated learning rates while requiring only a fraction of the resources consumed by traditional R&D. Combinatorial systems and methods (comprised if integrated processing, characterization and informatics) can significantly improve R&D ROI by accelerating materials discovery, process development, and integration learning at reduced costs (including time, wafers, and associated resources).

Semiconductor R&D benefits from those efficiencies in any economy — but in a downturn, it can be a matter of survival.