EDA emerging from worst year in recent history

By Laurie Balch, principal analyst, Gary Smith EDA

Feb. 10, 2009 – A year ago, all signs pointed to 2008 being a pretty good year for the EDA market — it was coming off of two consecutive years of 10% growth, and showing signs of fairly robust (albeit a bit lower) demand. Few could have imagined that 2008 would wrap up as the worst year by far in recent memory; initial numbers show a precipitous -16.6% overall decline.

A major factor in this huge drop-off in market size was the abrupt deterioration of economic conditions over the course of the year. As economic uncertainties intensified and spread throughout the electronics industry, EDA users began to rapidly scale back their spending as demand for their own products became more fragile. Consequently, three of the top four EDA vendors (Cadence, Mentor Graphics, and Magma) have experienced substantial declines in revenue. Only Synopsys has managed to maintain positive growth in 2008 — a rather impressive feat in keeping its head above water this long.

However, a weak market wasn’t the main reason for the miserable 2008 — the severity of the slide in revenue can be attributed to an accounting mess at Cadence. After restating its earnings, Cadence is poised for a revenue decline of well over 40% in 2008. The company’s “confusion” in recognizing revenue from a number of subscription license sales caused a very significant hiccup to its top-line performance.

Cadence’s unsuccessful attempt to acquire Mentor Graphics was another key contributor to its lousy financial results. We believe that the company’s corporate leadership had been banking on the takeover of Mentor to cover its mismanagement of business fundamentals. Its core business health was likely in far more serious trouble than anyone had guessed, and the Mentor bid was a desperate attempt to regain some market strength. The accounting and management debacle has cost Cadence its top marketshare ranking (now behind both Synopsys and Mentor), and it now faces a tough road ahead to recover its former leadership spot.

Is a recovery in sight?

Given that the overall economy is presently deep in the throes of recession, the EDA industry isn’t yet on the cusp of an upturn, and it won’t begin seeing positive growth until the electronics industry is ready to open its wallets again. We anticipate the downturn will likely last until 3Q09, at which point EDA spending will start to gradually improve, coinciding with the broader economic recovery as confidence returns and investment dollars flow once more.

The forecast picture is bleak through 2009 (see figure). After a -16.6% decline in 2008, the EDA market is forecast to scrape by with only about 1% growth in 2009. Once semiconductor industry growth becomes less uncertain, EDA growth should accelerate and head back into a healthy range in 2010 (10%) and 2011 (12%). Spending on design tools will once more become a priority; the need for advanced design technology is just too great in this era of rapidly shrinking IC design features and burgeoning gate counts. Note that the projected compound annual growth rate through 2013 is a mere 3.8%, due to the massive market fall-off in the near term of the forecast period.

Worldwide EDA market forecast through 2013. Product and maintenance revenue in US $M. (Source: Gary Smith EDA)

Future market growth drivers

Apart from the general macroeconomic conditions, what is driving the future prospects for the EDA market is development of cutting-edge design technologies that will enable the electronics industry to take advantage of the most advanced design methodologies, processes, and materials. Though new tools have been introduced in the past few years, many methodology transformations remain yet to be introduced. Therefore, it is incumbent on the EDA industry to maintain its focus on fully developing this next generation of design tools.

It’s no surprise that design-for-manufacturing (DFM) tools are a key element of the current EDA growth phase. This segment has become increasingly important as designs migrate to the 65nm and 45nm process nodes, where manufacturability issues become more difficult and DFM is critical to achieving successful design closure. The latest DFM issues now also require CAD tools to handle parallel processing and concurrent algorithms. These capabilities aren’t minor improvements to today’s CAD tools — they necessitate a complex and complete rewrite of today’s CAD tools that takes years of EDA development work, on top of the effort required by IC designers to implement new CAD technologies.

The frontend of the IC design flow is also currently in the midst of an inflection point. The evolution of the electronic system level (ESL) design methodology is a bit thornier problem to address. Because an ESL-based methodology involves bridging between IC designers, system designers, and embedded software designers — groups with traditionally different design needs and tool budgets — developing a full-fledged ESL flow is no small task. Creating a full suite of ESL technologies will be a necessary step for EDA to keep adequately serving electronics designers through future semiconductor generations.

ESL is very much in the early adopter stage, and relatively few commercial tools have emerged to date. Engineering teams are beginning to employ formal ESL tools already, but there’s much more development still to come. Even those that do use ESL technologies are only using them in a very limited fashion so far — which means there is lots of room for ESL growth ahead.

Laurie Balch is principal analyst at Gary Smith EDA. She was previously research director in Gartner Dataquest’s design and engineering group, tracking market trends in EDA, semiconductor automated test equipment (ATE), and design-for-test (DFT). E-mail: [email protected]


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